diff options
author | Lionel Landwerlin <[email protected]> | 2019-01-03 16:18:48 +0000 |
---|---|---|
committer | Lionel Landwerlin <[email protected]> | 2019-01-04 11:18:54 +0000 |
commit | 31e4c9ce400341df9b0136419b3b3c73b8c9eb7e (patch) | |
tree | 72c7a56dd886f68e4f8f6a75fc096cb57dea048d | |
parent | 92b7407090b1f11af49133968b63d583eba9b803 (diff) |
i965: add CS stall on VF invalidation workaround
Even with the previous commit, hangs are still happening. The problem
there is that the VF cache invalidate do happen immediately without
waiting for previous rendering to complete. What happens is that we
invalidate the cache the moment the PIPE_CONTROL is parsed but we
still have old rendering in the pipe which continues to pull data into
the cache with the old high address bits. The later rendering with the
new high address bits then doesn't have the clean cache that it
expects/needs.
v2: Update commit message/explanation with Jason's
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Fixes: a363bb2cd0e2a1 ("i965: Allocate VMA in userspace for full-PPGTT systems.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109072
-rw-r--r-- | src/mesa/drivers/dri/i965/genX_blorp_exec.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c index bb84317e1a0..f8fa76ae554 100644 --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c +++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c @@ -213,7 +213,7 @@ blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch, } if (need_invalidate) { - brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE); + brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL); } #endif } diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index ad8c463d474..dcdfb3c9292 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -567,7 +567,7 @@ vf_invalidate_for_vb_48bit_transitions(struct brw_context *brw) } if (need_invalidate) { - brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE); + brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL); } #endif } |