i965: Throw out guts of struct brw_instruction.

Signed-off-by: Matt Turner <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>

1 files changed, 1 insertions, 644 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 803dc6eb4f0..a0f26461a64 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -766,655 +766,12 @@ struct gen7_sf_clip_viewport {
    float pad1[4];
 };
 
-struct brw_urb_immediate {
-   unsigned opcode:4;
-   unsigned offset:6;
-   unsigned swizzle_control:2;
-   unsigned pad:1;
-   unsigned allocate:1;
-   unsigned used:1;
-   unsigned complete:1;
-   unsigned response_length:4;
-   unsigned msg_length:4;
-   unsigned msg_target:4;
-   unsigned pad1:3;
-   unsigned end_of_thread:1;
-};
-
 /* Instruction format for the execution units:
  */
 
 struct brw_instruction
 {
-   struct
-   {
-      unsigned opcode:7;
-      unsigned pad:1;
-      unsigned access_mode:1;
-      unsigned mask_control:1;
-      unsigned dependency_control:2;
-      unsigned compression_control:2; /* gen6: quarter control */
-      unsigned thread_control:2;
-      unsigned predicate_control:4;
-      unsigned predicate_inverse:1;
-      unsigned execution_size:3;
-      /**
-       * Conditional Modifier for most instructions.  On Gen6+, this is also
-       * used for the SEND instruction's Message Target/SFID.
-       */
-      unsigned destreg__conditionalmod:4;
-      unsigned acc_wr_control:1;
-      unsigned cmpt_control:1;
-      unsigned debug_control:1;
-      unsigned saturate:1;
-   } header;
-
-   union {
-      struct
-      {
-	 unsigned dest_reg_file:2;
-	 unsigned dest_reg_type:3;
-	 unsigned src0_reg_file:2;
-	 unsigned src0_reg_type:3;
-	 unsigned src1_reg_file:2;
-	 unsigned src1_reg_type:3;
-         unsigned nibctrl:1; /* gen7+ */
-	 unsigned dest_subreg_nr:5;
-	 unsigned dest_reg_nr:8;
-	 unsigned dest_horiz_stride:2;
-	 unsigned dest_address_mode:1;
-      } da1;
-
-      struct
-      {
-	 unsigned dest_reg_file:2;
-	 unsigned dest_reg_type:3;
-	 unsigned src0_reg_file:2;
-	 unsigned src0_reg_type:3;
-	 unsigned src1_reg_file:2;        /* 0x00000c00 */
-	 unsigned src1_reg_type:3;        /* 0x00007000 */
-         unsigned nibctrl:1; /* gen7+ */
-	 int dest_indirect_offset:10;	/* offset against the deref'd address reg */
-	 unsigned dest_subreg_nr:3; /* subnr for the address reg a0.x */
-	 unsigned dest_horiz_stride:2;
-	 unsigned dest_address_mode:1;
-      } ia1;
-
-      struct
-      {
-	 unsigned dest_reg_file:2;
-	 unsigned dest_reg_type:3;
-	 unsigned src0_reg_file:2;
-	 unsigned src0_reg_type:3;
-	 unsigned src1_reg_file:2;
-	 unsigned src1_reg_type:3;
-         unsigned nibctrl:1; /* gen7+ */
-	 unsigned dest_writemask:4;
-	 unsigned dest_subreg_nr:1;
-	 unsigned dest_reg_nr:8;
-	 unsigned dest_horiz_stride:2;
-	 unsigned dest_address_mode:1;
-      } da16;
-
-      struct
-      {
-	 unsigned dest_reg_file:2;
-	 unsigned dest_reg_type:3;
-	 unsigned src0_reg_file:2;
-	 unsigned src0_reg_type:3;
-         unsigned src1_reg_file:2;
-         unsigned src1_reg_type:3;
-         unsigned nibctrl:1; /* gen7+ */
-	 unsigned dest_writemask:4;
-	 int dest_indirect_offset:6;
-	 unsigned dest_subreg_nr:3;
-	 unsigned dest_horiz_stride:2;
-	 unsigned dest_address_mode:1;
-      } ia16;
-
-      struct {
-	 unsigned dest_reg_file:2;
-	 unsigned dest_reg_type:3;
-	 unsigned src0_reg_file:2;
-	 unsigned src0_reg_type:3;
-	 unsigned src1_reg_file:2;
-	 unsigned src1_reg_type:3;
-	 unsigned pad:1;
-
-	 int jump_count:16;
-      } branch_gen6;
-
-      struct {
-         unsigned dest_reg_file:1; /* gen6, not gen7+ */
-	 unsigned flag_subreg_num:1;
-         unsigned flag_reg_nr:1; /* gen7+ */
-         unsigned pad0:1;
-	 unsigned src0_abs:1;
-	 unsigned src0_negate:1;
-	 unsigned src1_abs:1;
-	 unsigned src1_negate:1;
-	 unsigned src2_abs:1;
-	 unsigned src2_negate:1;
-         unsigned src_type:2; /* gen7+ */
-         unsigned dst_type:2; /* gen7+ */
-         unsigned pad1:1;
-         unsigned nibctrl:1; /* gen7+ */
-         unsigned pad2:1;
-	 unsigned dest_writemask:4;
-	 unsigned dest_subreg_nr:3;
-	 unsigned dest_reg_nr:8;
-      } da3src;
-
-      uint32_t ud;
-   } bits1;
-
-
-   union {
-      struct
-      {
-	 unsigned src0_subreg_nr:5;
-	 unsigned src0_reg_nr:8;
-	 unsigned src0_abs:1;
-	 unsigned src0_negate:1;
-	 unsigned src0_address_mode:1;
-	 unsigned src0_horiz_stride:2;
-	 unsigned src0_width:3;
-	 unsigned src0_vert_stride:4;
-	 unsigned flag_subreg_nr:1;
-         unsigned flag_reg_nr:1; /* gen7+ */
-	 unsigned pad:5;
-      } da1;
-
-      struct
-      {
-	 int src0_indirect_offset:10;
-	 unsigned src0_subreg_nr:3;
-	 unsigned src0_abs:1;
-	 unsigned src0_negate:1;
-	 unsigned src0_address_mode:1;
-	 unsigned src0_horiz_stride:2;
-	 unsigned src0_width:3;
-	 unsigned src0_vert_stride:4;
-	 unsigned flag_subreg_nr:1;
-         unsigned flag_reg_nr:1; /* gen7+ */
-	 unsigned pad:5;
-      } ia1;
-
-      struct
-      {
-	 unsigned src0_swz_x:2;
-	 unsigned src0_swz_y:2;
-	 unsigned src0_subreg_nr:1;
-	 unsigned src0_reg_nr:8;
-	 unsigned src0_abs:1;
-	 unsigned src0_negate:1;
-	 unsigned src0_address_mode:1;
-	 unsigned src0_swz_z:2;
-	 unsigned src0_swz_w:2;
-	 unsigned pad0:1;
-	 unsigned src0_vert_stride:4;
-	 unsigned flag_subreg_nr:1;
-         unsigned flag_reg_nr:1; /* gen7+ */
-	 unsigned pad1:5;
-      } da16;
-
-      struct
-      {
-	 unsigned src0_swz_x:2;
-	 unsigned src0_swz_y:2;
-	 int src0_indirect_offset:6;
-	 unsigned src0_subreg_nr:3;
-	 unsigned src0_abs:1;
-	 unsigned src0_negate:1;
-	 unsigned src0_address_mode:1;
-	 unsigned src0_swz_z:2;
-	 unsigned src0_swz_w:2;
-	 unsigned pad0:1;
-	 unsigned src0_vert_stride:4;
-	 unsigned flag_subreg_nr:1;
-         unsigned flag_reg_nr:1; /* gen7+ */
-	 unsigned pad1:5;
-      } ia16;
-
-      /* Extended Message Descriptor for Ironlake (Gen5) SEND instruction.
-       *
-       * Does not apply to Gen6+.  The SFID/message target moved to bits
-       * 27:24 of the header (destreg__conditionalmod); EOT is in bits3.
-       */
-       struct
-       {
-           unsigned pad:26;
-           unsigned end_of_thread:1;
-           unsigned pad1:1;
-           unsigned sfid:4;
-       } send_gen5;  /* for Ironlake only */
-
-      struct {
-	 unsigned src0_rep_ctrl:1;
-	 unsigned src0_swizzle:8;
-	 unsigned src0_subreg_nr:3;
-	 unsigned src0_reg_nr:8;
-	 unsigned pad0:1;
-	 unsigned src1_rep_ctrl:1;
-	 unsigned src1_swizzle:8;
-	 unsigned src1_subreg_nr_low:2;
-      } da3src;
-
-      uint32_t ud;
-   } bits2;
-
-   union
-   {
-      struct
-      {
-	 unsigned src1_subreg_nr:5;
-	 unsigned src1_reg_nr:8;
-	 unsigned src1_abs:1;
-	 unsigned src1_negate:1;
-	 unsigned src1_address_mode:1;
-	 unsigned src1_horiz_stride:2;
-	 unsigned src1_width:3;
-	 unsigned src1_vert_stride:4;
-	 unsigned pad0:7;
-      } da1;
-
-      struct
-      {
-	 unsigned src1_swz_x:2;
-	 unsigned src1_swz_y:2;
-	 unsigned src1_subreg_nr:1;
-	 unsigned src1_reg_nr:8;
-	 unsigned src1_abs:1;
-	 unsigned src1_negate:1;
-	 unsigned src1_address_mode:1;
-	 unsigned src1_swz_z:2;
-	 unsigned src1_swz_w:2;
-	 unsigned pad1:1;
-	 unsigned src1_vert_stride:4;
-	 unsigned pad2:7;
-      } da16;
-
-      struct
-      {
-	 int  src1_indirect_offset:10;
-	 unsigned src1_subreg_nr:3;
-	 unsigned src1_abs:1;
-	 unsigned src1_negate:1;
-	 unsigned src1_address_mode:1;
-	 unsigned src1_horiz_stride:2;
-	 unsigned src1_width:3;
-	 unsigned src1_vert_stride:4;
-	 unsigned pad1:7;
-      } ia1;
-
-      struct
-      {
-	 unsigned src1_swz_x:2;
-	 unsigned src1_swz_y:2;
-	 int  src1_indirect_offset:6;
-	 unsigned src1_subreg_nr:3;
-	 unsigned src1_abs:1;
-	 unsigned src1_negate:1;
-	 unsigned pad0:1;
-	 unsigned src1_swz_z:2;
-	 unsigned src1_swz_w:2;
-	 unsigned pad1:1;
-	 unsigned src1_vert_stride:4;
-	 unsigned pad2:7;
-      } ia16;
-
-
-      struct
-      {
-	 int  jump_count:16;	/* note: signed */
-	 unsigned  pop_count:4;
-	 unsigned  pad0:12;
-      } if_else;
-
-      /* This is also used for gen7 IF/ELSE instructions */
-      struct
-      {
-	 /* Signed jump distance to the ip to jump to if all channels
-	  * are disabled after the break or continue.  It should point
-	  * to the end of the innermost control flow block, as that's
-	  * where some channel could get re-enabled.
-	  */
-	 int jip:16;
-
-	 /* Signed jump distance to the location to resume execution
-	  * of this channel if it's enabled for the break or continue.
-	  */
-	 int uip:16;
-      } break_cont;
-
-      /**
-       * \defgroup SEND instructions / Message Descriptors
-       *
-       * @{
-       */
-
-      /**
-       * Generic Message Descriptor for Gen4 SEND instructions.  The structs
-       * below expand function_control to something specific for their
-       * message.  Due to struct packing issues, they duplicate these bits.
-       *
-       * See the G45 PRM, Volume 4, Table 14-15.
-       */
-      struct {
-	 unsigned function_control:16;
-	 unsigned response_length:4;
-	 unsigned msg_length:4;
-	 unsigned msg_target:4;
-	 unsigned pad1:3;
-	 unsigned end_of_thread:1;
-      } generic;
-
-      /**
-       * Generic Message Descriptor for Gen5-7 SEND instructions.
-       *
-       * See the Sandybridge PRM, Volume 2 Part 2, Table 8-15.  (Sadly, most
-       * of the information on the SEND instruction is missing from the public
-       * Ironlake PRM.)
-       *
-       * The table claims that bit 31 is reserved/MBZ on Gen6+, but it lies.
-       * According to the SEND instruction description:
-       * "The MSb of the message description, the EOT field, always comes from
-       *  bit 127 of the instruction word"...which is bit 31 of this field.
-       */
-      struct {
-	 unsigned function_control:19;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } generic_gen5;
-
-      /** G45 PRM, Volume 4, Section 6.1.1.1 */
-      struct {
-	 unsigned function:4;
-	 unsigned int_type:1;
-	 unsigned precision:1;
-	 unsigned saturate:1;
-	 unsigned data_type:1;
-	 unsigned pad0:8;
-	 unsigned response_length:4;
-	 unsigned msg_length:4;
-	 unsigned msg_target:4;
-	 unsigned pad1:3;
-	 unsigned end_of_thread:1;
-      } math;
-
-      /** Ironlake PRM, Volume 4 Part 1, Section 6.1.1.1 */
-      struct {
-	 unsigned function:4;
-	 unsigned int_type:1;
-	 unsigned precision:1;
-	 unsigned saturate:1;
-	 unsigned data_type:1;
-	 unsigned snapshot:1;
-	 unsigned pad0:10;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } math_gen5;
-
-      /** G45 PRM, Volume 4, Section 4.8.1.1.1 [DevBW] and [DevCL] */
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned sampler:4;
-	 unsigned return_format:2;
-	 unsigned msg_type:2;
-	 unsigned response_length:4;
-	 unsigned msg_length:4;
-	 unsigned msg_target:4;
-	 unsigned pad1:3;
-	 unsigned end_of_thread:1;
-      } sampler;
-
-      /** G45 PRM, Volume 4, Section 4.8.1.1.2 [DevCTG] */
-      struct {
-         unsigned binding_table_index:8;
-         unsigned sampler:4;
-         unsigned msg_type:4;
-         unsigned response_length:4;
-         unsigned msg_length:4;
-         unsigned msg_target:4;
-         unsigned pad1:3;
-         unsigned end_of_thread:1;
-      } sampler_g4x;
-
-      /** Ironlake PRM, Volume 4 Part 1, Section 4.11.1.1.3 */
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned sampler:4;
-	 unsigned msg_type:4;
-	 unsigned simd_mode:2;
-	 unsigned pad0:1;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } sampler_gen5;
-
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned sampler:4;
-	 unsigned msg_type:5;
-	 unsigned simd_mode:2;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } sampler_gen7;
-
-      struct brw_urb_immediate urb;
-
-      struct {
-	 unsigned opcode:4;
-	 unsigned offset:6;
-	 unsigned swizzle_control:2;
-	 unsigned pad:1;
-	 unsigned allocate:1;
-	 unsigned used:1;
-	 unsigned complete:1;
-	 unsigned pad0:3;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } urb_gen5;
-
-      struct {
-	 unsigned opcode:3;
-	 unsigned offset:11;
-	 unsigned swizzle_control:1;
-	 unsigned complete:1;
-	 unsigned per_slot_offset:1;
-	 unsigned pad0:2;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } urb_gen7;
-
-      /** 965 PRM, Volume 4, Section 5.10.1.1: Message Descriptor */
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned msg_control:4;
-	 unsigned msg_type:2;
-	 unsigned target_cache:2;
-	 unsigned response_length:4;
-	 unsigned msg_length:4;
-	 unsigned msg_target:4;
-	 unsigned pad1:3;
-	 unsigned end_of_thread:1;
-      } dp_read;
-
-      /** G45 PRM, Volume 4, Section 5.10.1.1.2 */
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned msg_control:3;
-	 unsigned msg_type:3;
-	 unsigned target_cache:2;
-	 unsigned response_length:4;
-	 unsigned msg_length:4;
-	 unsigned msg_target:4;
-	 unsigned pad1:3;
-	 unsigned end_of_thread:1;
-      } dp_read_g4x;
-
-      /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned msg_control:3;
-	 unsigned msg_type:3;
-	 unsigned target_cache:2;
-	 unsigned pad0:3;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } dp_read_gen5;
-
-      /** G45 PRM, Volume 4, Section 5.10.1.1.2.  For both Gen4 and G45. */
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned msg_control:3;
-	 unsigned last_render_target:1;
-	 unsigned msg_type:3;
-	 unsigned send_commit_msg:1;
-	 unsigned response_length:4;
-	 unsigned msg_length:4;
-	 unsigned msg_target:4;
-	 unsigned pad1:3;
-	 unsigned end_of_thread:1;
-      } dp_write;
-
-      /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned msg_control:3;
-	 unsigned last_render_target:1;
-	 unsigned msg_type:3;
-	 unsigned send_commit_msg:1;
-	 unsigned pad0:3;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } dp_write_gen5;
-
-      /**
-       * Message for the Sandybridge Sampler Cache or Constant Cache Data Port.
-       *
-       * See the Sandybridge PRM, Volume 4 Part 1, Section 3.9.2.1.1.
-       **/
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned msg_control:5;
-	 unsigned msg_type:3;
-	 unsigned pad0:3;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } gen6_dp_sampler_const_cache;
-
-      /**
-       * Message for the Sandybridge Render Cache Data Port.
-       *
-       * Most fields are defined in the Sandybridge PRM, Volume 4 Part 1,
-       * Section 3.9.2.1.1: Message Descriptor.
-       *
-       * "Slot Group Select" and "Last Render Target" are part of the
-       * 5-bit message control for Render Target Write messages.  See
-       * Section 3.9.9.2.1 of the same volume.
-       */
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned msg_control:3;
-	 unsigned slot_group_select:1;
-	 unsigned last_render_target:1;
-	 unsigned msg_type:4;
-	 unsigned send_commit_msg:1;
-	 unsigned pad0:1;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad1:2;
-	 unsigned end_of_thread:1;
-      } gen6_dp;
-
-      /**
-       * Message for any of the Gen7 Data Port caches.
-       *
-       * Most fields are defined in the Ivybridge PRM, Volume 4 Part 1,
-       * section 3.9.2.1.1 "Message Descriptor".  Once again, "Slot Group
-       * Select" and "Last Render Target" are part of the 6-bit message
-       * control for Render Target Writes (section 3.9.11.2).
-       */
-      struct {
-	 unsigned binding_table_index:8;
-	 unsigned msg_control:3;
-	 unsigned slot_group_select:1;
-	 unsigned last_render_target:1;
-	 unsigned msg_control_pad:1;
-	 unsigned msg_type:4;
-	 unsigned pad1:1;
-	 unsigned header_present:1;
-	 unsigned response_length:5;
-	 unsigned msg_length:4;
-	 unsigned pad2:2;
-	 unsigned end_of_thread:1;
-      } gen7_dp;
-
-      /**
-       * Message for the Gen7 Pixel Interpolator.
-       *
-       * Defined in the Ivybridge PRM, Volume 4 Part 2,
-       * section 4.1.1.1.
-       */
-      struct {
-         unsigned msg_data:8;
-         unsigned pad1:3;
-         unsigned slot_group:1;
-         unsigned msg_type:2;
-         unsigned interpolation_mode:1;
-         unsigned pad2:1;
-         unsigned simd_mode:1;
-         unsigned pad3:1;
-         unsigned response_length:5;
-         unsigned msg_length:4;
-         unsigned pad4:2;
-         unsigned end_of_thread:1;
-      } gen7_pi;
-      /** @} */
-
-      struct {
-	 unsigned src1_subreg_nr_high:1;
-	 unsigned src1_reg_nr:8;
-	 unsigned pad0:1;
-	 unsigned src2_rep_ctrl:1;
-	 unsigned src2_swizzle:8;
-	 unsigned src2_subreg_nr:3;
-	 unsigned src2_reg_nr:8;
-	 unsigned pad1:2;
-      } da3src;
-
-      int d;
-      unsigned ud;
-      float f;
-   } bits3;
+   uint64_t data[2];
 };
 
 struct brw_compact_instruction {