diff options
| author | Marek Olšák <[email protected]> | 2016-02-11 21:06:33 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2016-02-21 21:08:58 +0100 |
| commit | 10fa269f4f8e3d58c10e7b3ab317e2d65f8f2f3c (patch) | |
| tree | 07bc3f3793a5392561311bcdaf9ed34de3a10054 | |
| parent | 9aaf28da629e025f652c7ff63750ad8ee513ff42 (diff) | |
radeonsi: use smaller types for some si_shader members
in order to decrease the shader size for a shader cache.
v2: add & use SI_MAX_VS_OUTPUTS
Reviewed-by: Nicolai Hähnle <[email protected]>
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.h | 8 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 9183852a856..c20abfc7cb4 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1893,6 +1893,7 @@ handle_semantic: case TGSI_SEMANTIC_COLOR: case TGSI_SEMANTIC_BCOLOR: target = V_008DFC_SQ_EXP_PARAM + param_count; + assert(i < ARRAY_SIZE(shader->vs_output_param_offset)); shader->vs_output_param_offset[i] = param_count; param_count++; break; @@ -1907,6 +1908,7 @@ handle_semantic: case TGSI_SEMANTIC_TEXCOORD: case TGSI_SEMANTIC_GENERIC: target = V_008DFC_SQ_EXP_PARAM + param_count; + assert(i < ARRAY_SIZE(shader->vs_output_param_offset)); shader->vs_output_param_offset[i] = param_count; param_count++; break; @@ -5280,6 +5282,7 @@ static bool si_get_vs_epilog(struct si_screen *sscreen, unsigned offset = shader->nr_param_exports++; epilog_key.vs_epilog.prim_id_param_offset = offset; + assert(index < ARRAY_SIZE(shader->vs_output_param_offset)); shader->vs_output_param_offset[index] = offset; } diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index ee81621a702..88602dcd811 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -75,6 +75,8 @@ struct radeon_shader_binary; struct radeon_shader_reloc; +#define SI_MAX_VS_OUTPUTS 40 + #define SI_SGPR_RW_BUFFERS 0 /* rings (& stream-out, VS only) */ #define SI_SGPR_CONST_BUFFERS 2 #define SI_SGPR_SAMPLERS 4 /* images & sampler states interleaved */ @@ -359,10 +361,10 @@ struct si_shader { ubyte num_input_vgprs; char face_vgpr_index; - unsigned vs_output_param_offset[PIPE_MAX_SHADER_OUTPUTS]; + ubyte vs_output_param_offset[SI_MAX_VS_OUTPUTS]; bool uses_instanceid; - unsigned nr_pos_exports; - unsigned nr_param_exports; + ubyte nr_pos_exports; + ubyte nr_param_exports; }; struct si_shader_part { |