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authorLionel Landwerlin <[email protected]>2018-10-29 18:14:46 +0000
committerLionel Landwerlin <[email protected]>2018-11-05 15:45:07 +0000
commite400ac52e46a69ea643d35a64466f9a1bedee4fc (patch)
tree4e09915c8e8b120290eb304e8bb161e9b4f7c0dd
parentc5fca35af1694bd515883ade4b4ab723fe7fcad0 (diff)
intel/sanitize_gpu: deal with non page multiple buffer sizes
We can only map at page aligned offsets. We got that wrong with buffer size where (size % 4096) != 0 (anv has a WA buffer of 1024). Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
-rw-r--r--src/intel/tools/intel_sanitize_gpu.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/src/intel/tools/intel_sanitize_gpu.c b/src/intel/tools/intel_sanitize_gpu.c
index 9b49b0bbf22..4f1a2d2ead5 100644
--- a/src/intel/tools/intel_sanitize_gpu.c
+++ b/src/intel/tools/intel_sanitize_gpu.c
@@ -39,6 +39,7 @@
#include <i915_drm.h>
#include "util/hash_table.h"
+#include "util/u_math.h"
#define INTEL_LOG_TAG "INTEL-SANITIZE-GPU"
#include "common/intel_log.h"
@@ -165,7 +166,7 @@ padding_is_good(int fd, uint32_t handle)
{
struct drm_i915_gem_mmap mmap_arg = {
.handle = handle,
- .offset = bo_size(fd, handle),
+ .offset = align64(bo_size(fd, handle), 4096),
.size = PADDING_SIZE,
.flags = 0,
};
@@ -207,9 +208,11 @@ padding_is_good(int fd, uint32_t handle)
static int
create_with_padding(int fd, struct drm_i915_gem_create *create)
{
- create->size += PADDING_SIZE;
+ uint64_t original_size = create->size;
+
+ create->size = align64(original_size, 4096) + PADDING_SIZE;
int ret = libc_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, create);
- create->size -= PADDING_SIZE;
+ create->size = original_size;
if (ret != 0)
return ret;
@@ -217,7 +220,7 @@ create_with_padding(int fd, struct drm_i915_gem_create *create)
uint8_t *noise_values;
struct drm_i915_gem_mmap mmap_arg = {
.handle = create->handle,
- .offset = create->size,
+ .offset = align64(create->size, 4096),
.size = PADDING_SIZE,
.flags = 0,
};