diff options
| author | Rob Clark <[email protected]> | 2018-06-04 13:31:47 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2018-06-11 09:06:03 -0400 |
| commit | cf5dda334945e2cbfaf5f83fd32c3fa01f436d81 (patch) | |
| tree | 25f86e5b2c1c6d44b64487b19ac7b1fb45f7ff19 | |
| parent | 39e7a39e9131d99058e206b5b9cee1a5843e6219 (diff) | |
freedreno/ir3: don't cp absneg into meta:fi
If using a fanin (collect) to collect of consecutive registers together,
we can CP mov's into the fanin, but not (abs) or (neg). No places that
allow those modifiers are consuming a fanin anyways. But this caused an
absneg to be lost between a ldgb and stgb for shaders like:
outputs[n] = abs(input[n])
Signed-off-by: Rob Clark <[email protected]>
| -rw-r--r-- | src/gallium/drivers/freedreno/ir3/ir3_cp.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_cp.c b/src/gallium/drivers/freedreno/ir3/ir3_cp.c index e3a3a9db690..0ee8ea2e0ea 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_cp.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_cp.c @@ -543,6 +543,10 @@ instr_cp(struct ir3_cp_ctx *ctx, struct ir3_instruction *instr) if (reg->flags & IR3_REG_ARRAY) continue; + /* Don't CP absneg into meta instructions, that won't end well: */ + if (is_meta(instr) && (src->opc != OPC_MOV)) + continue; + reg_cp(ctx, instr, reg, n); } |