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authorDave Airlie <[email protected]>2017-12-27 07:56:12 +1000
committerDave Airlie <[email protected]>2017-12-27 11:10:35 +1000
commitcf363e440501b5abf37c319c5e2635c664ec5fe1 (patch)
tree582f8c6a6c4c704e3383bc2d22dcabdabf91b5c4
parenta88532c612c49681b7622ce8a4afc7417c88694c (diff)
amd/common/radv/radeonsi: use register defines for dcc block sizes.
These are just taken from amdvlk, we probably knew these already, but may as well port them now. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
-rw-r--r--src/amd/common/sid.h6
-rw-r--r--src/amd/vulkan/radv_device.c6
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c6
3 files changed, 12 insertions, 6 deletions
diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
index 59a7e2a06e6..3588d39d62b 100644
--- a/src/amd/common/sid.h
+++ b/src/amd/common/sid.h
@@ -8954,9 +8954,15 @@
#define S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 2)
#define G_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(x) (((x) >> 2) & 0x03)
#define C_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE 0xFFFFFFF3
+#define V_028C78_MAX_BLOCK_SIZE_64B 0
+#define V_028C78_MAX_BLOCK_SIZE_128B 1
+#define V_028C78_MAX_BLOCK_SIZE_256B 2
+
#define S_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x1) << 4)
#define G_028C78_MIN_COMPRESSED_BLOCK_SIZE(x) (((x) >> 4) & 0x1)
#define C_028C78_MIN_COMPRESSED_BLOCK_SIZE 0xFFFFFFEF
+#define V_028C78_MIN_BLOCK_SIZE_32B 0
+#define V_028C78_MIN_BLOCK_SIZE_64B 1
#define S_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((unsigned)(x) & 0x03) << 5)
#define G_028C78_MAX_COMPRESSED_BLOCK_SIZE(x) (((x) >> 5) & 0x03)
#define C_028C78_MAX_COMPRESSED_BLOCK_SIZE 0xFFFFFF9F
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 3056122593c..5c8d51dedc7 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3161,12 +3161,12 @@ radv_initialise_color_surface(struct radv_device *device,
cb->cb_color_info |= S_028C70_DCC_ENABLE(1);
if (device->physical_device->rad_info.chip_class >= VI) {
- unsigned max_uncompressed_block_size = 2;
+ unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
if (iview->image->info.samples > 1) {
if (iview->image->surface.bpe == 1)
- max_uncompressed_block_size = 0;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
else if (iview->image->surface.bpe == 2)
- max_uncompressed_block_size = 1;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B;
}
cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 7cf3896a5c7..d2d5dd70ecf 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2450,13 +2450,13 @@ static void si_initialize_color_surface(struct si_context *sctx,
}
if (sctx->b.chip_class >= VI) {
- unsigned max_uncompressed_block_size = 2;
+ unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
if (rtex->resource.b.b.nr_samples > 1) {
if (rtex->surface.bpe == 1)
- max_uncompressed_block_size = 0;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
else if (rtex->surface.bpe == 2)
- max_uncompressed_block_size = 1;
+ max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B;
}
surf->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |