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authorSamuel Pitoiset <[email protected]>2017-10-06 09:53:20 +0200
committerSamuel Pitoiset <[email protected]>2017-10-09 10:06:17 +0200
commitb09b43b166b1e532bdfb4960a33f9f82e7070029 (patch)
tree3370244c0ffbc1ecd80b6be85b7abd6682609c57
parentd4652e7c86249ca514e31b4b14b3cc95abeed85a (diff)
radv: do not need to zero-init ds/raster states
Already done when creating the pipeline. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
-rw-r--r--src/amd/vulkan/radv_pipeline.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 670b89c9223..c3458fa0372 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -937,7 +937,6 @@ radv_pipeline_init_depth_stencil_state(struct radv_pipeline *pipeline,
const VkPipelineDepthStencilStateCreateInfo *vkds = pCreateInfo->pDepthStencilState;
struct radv_depth_stencil_state *ds = &pipeline->graphics.ds;
- memset(ds, 0, sizeof(*ds));
if (!vkds)
return;
@@ -1004,8 +1003,6 @@ radv_pipeline_init_raster_state(struct radv_pipeline *pipeline,
const VkPipelineRasterizationStateCreateInfo *vkraster = pCreateInfo->pRasterizationState;
struct radv_raster_state *raster = &pipeline->graphics.raster;
- memset(raster, 0, sizeof(*raster));
-
raster->spi_interp_control =
S_0286D4_FLAT_SHADE_ENA(1) |
S_0286D4_PNT_SPRITE_ENA(1) |