diff options
author | Rafael Antognolli <[email protected]> | 2020-02-20 11:02:52 -0800 |
---|---|---|
committer | Marge Bot <[email protected]> | 2020-02-26 21:16:24 +0000 |
commit | a70a605ad63d95a6e7ce7cfd61fc1ca4e9616e74 (patch) | |
tree | 819de9580e720956ce4a86f40d36ec524c4dd92d | |
parent | f6d1dd34d76c1930b6f5223ae7e1c6b7f52ec4cd (diff) |
iris: Apply the flushes when switching pipelines.
Even though the workaround description says:
"all the listed commands are non-pipelined and hence flush caused due
to pipeline mode change must not cause performance issues..."
My understanding is that we still need to have the flushes. Also, the
flushes are required not only to stall the pipeline, but also to clear
caches, so I don't think they can simply be discarded.
Additionally, while doing some testing that increased the number of
surface STATE_BASE_ADDRESS emitted, I got a lot more GPU hangs. Adding
these flushes fixes those hangs.
Fixes: b8fbb39a (iris: Implement Gen12 workaround for non pipelined
state)
Reviewed-by: Lionel Landwerlin <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
-rw-r--r-- | src/gallium/drivers/iris/iris_state.c | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 7f25e1f7676..3151c9b62be 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -5047,12 +5047,8 @@ iris_update_surface_base_address(struct iris_batch *batch, * Workaround the non pipelined state not applying in MEDIA/GPGPU pipeline * mode by putting the pipeline temporarily in 3D mode.. */ - if (batch->name == IRIS_BATCH_COMPUTE) { - iris_emit_cmd(batch, GENX(PIPELINE_SELECT), sel) { - sel.MaskBits = 3; - sel.PipelineSelection = _3D; - } - } + if (batch->name == IRIS_BATCH_COMPUTE) + emit_pipeline_select(batch, _3D); #endif iris_emit_cmd(batch, GENX(STATE_BASE_ADDRESS), sba) { @@ -5078,12 +5074,8 @@ iris_update_surface_base_address(struct iris_batch *batch, * * Put the pipeline back into compute mode. */ - if (batch->name == IRIS_BATCH_COMPUTE) { - iris_emit_cmd(batch, GENX(PIPELINE_SELECT), sel) { - sel.MaskBits = 3; - sel.PipelineSelection = GPGPU; - } - } + if (batch->name == IRIS_BATCH_COMPUTE) + emit_pipeline_select(batch, GPGPU); #endif flush_after_state_base_change(batch); |