diff options
| author | Marek Olšák <[email protected]> | 2018-04-13 20:04:04 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-04-13 20:05:53 -0400 |
| commit | 976db661ff77bf3e2f026dfb192545eb1cfd9250 (patch) | |
| tree | 62ad408703291f334aa65828fc776d7b15a5c3ae | |
| parent | f2c6a5506114f74fb12d77aeddb2f06b5602101c (diff) | |
radeonsi: restore si_emit_cache_flush call at the end of IBs
Fixes: 918b798668c "radeonsi: make sure CP DMA is idle at the end of IBs"
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_gfx_cs.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c index 2d5e510b19e..b1ed620b0c6 100644 --- a/src/gallium/drivers/radeonsi/si_gfx_cs.c +++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c @@ -116,6 +116,8 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, if (ctx->chip_class >= CIK) si_cp_dma_wait_for_idle(ctx); + si_emit_cache_flush(ctx); + if (ctx->current_saved_cs) { si_trace_emit(ctx); si_log_hw_flush(ctx); |