diff options
author | Jonathan Marek <[email protected]> | 2020-02-11 21:08:58 -0500 |
---|---|---|
committer | Jonathan Marek <[email protected]> | 2020-02-14 08:22:33 -0500 |
commit | 946eacbafb47c8b94d47e7c9d2a8b02fff5a22fa (patch) | |
tree | 961bfe1595c9a5a4a842375a7155585b1cdb5012 | |
parent | 75fbe089a6a29b01c2b3425b1c0fc2ee43bc5ff8 (diff) |
freedreno/a6xx: document some unknown bits
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Rob Clark <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3814>
-rw-r--r-- | src/freedreno/registers/a6xx.xml | 10 | ||||
-rw-r--r-- | src/freedreno/vulkan/tu_pipeline.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c | 2 |
3 files changed, 12 insertions, 4 deletions
diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml index 2c4266e90b4..c03b3e6f133 100644 --- a/src/freedreno/registers/a6xx.xml +++ b/src/freedreno/registers/a6xx.xml @@ -1767,7 +1767,15 @@ to upconvert to 32b float internally? <!-- always 0x03200000 ? --> <reg32 offset="0x0e12" name="UCHE_UNKNOWN_0E12"/> - <reg32 offset="0x8000" name="GRAS_UNKNOWN_8000"/> + <reg32 offset="0x8000" name="GRAS_DISABLE_CNTL"> + <!-- likely something clip-disable related --> + <bitfield name="UNK0" pos="0" type="boolean"/> + <!-- guess based on a3xx and meaning of bits 8 and 9 + if the guess is right then this is related to point sprite clipping --> + <bitfield name="VP_CLIP_CODE_IGNORE" pos="7" type="boolean"/> + <bitfield name="VP_XFORM_DISABLE" pos="8" type="boolean"/> + <bitfield name="PERSP_DIVISION_DISABLE" pos="9" type="boolean"/> + </reg32> <reg32 offset="0x8001" name="GRAS_UNKNOWN_8001"/> <reg32 offset="0x8002" name="GRAS_UNKNOWN_8002"/> <reg32 offset="0x8003" name="GRAS_UNKNOWN_8003"/> diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c index a0e22e7bce8..5519cfe7139 100644 --- a/src/freedreno/vulkan/tu_pipeline.c +++ b/src/freedreno/vulkan/tu_pipeline.c @@ -1223,8 +1223,8 @@ tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor) static void tu6_emit_gras_unknowns(struct tu_cs *cs) { - tu_cs_emit_pkt4(cs, REG_A6XX_GRAS_UNKNOWN_8000, 1); - tu_cs_emit(cs, 0x80); + tu_cs_emit_pkt4(cs, REG_A6XX_GRAS_DISABLE_CNTL, 1); + tu_cs_emit(cs, A6XX_GRAS_DISABLE_CNTL_VP_CLIP_CODE_IGNORE); tu_cs_emit_pkt4(cs, REG_A6XX_GRAS_UNKNOWN_8001, 1); tu_cs_emit(cs, 0x0); tu_cs_emit_pkt4(cs, REG_A6XX_GRAS_LAYER_CNTL, 1); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c index 4cc31c5d38b..db0c249d83e 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c @@ -52,7 +52,7 @@ __fd6_setup_rasterizer_stateobj(struct fd_context *ctx, } OUT_REG(ring, - A6XX_GRAS_UNKNOWN_8000(.unknown = 0x80), + A6XX_GRAS_DISABLE_CNTL(.vp_clip_code_ignore = 1), A6XX_GRAS_UNKNOWN_8001()); OUT_REG(ring, |