diff options
| author | Francisco Jerez <[email protected]> | 2015-06-04 16:05:33 +0300 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2015-06-09 15:18:31 +0300 |
| commit | 497d238ae72aa59fb32b21191a1a0444ca09fc10 (patch) | |
| tree | 34055ebc39ffd4b33e9d0a4a65f72564ccb7d47f | |
| parent | 8013b8147ae5fc652799c7ff01c2d419ebebe3db (diff) | |
i965/vec4: Take into account all instruction fields in CSE instructions_match().
Most of these fields affect the behaviour of the instruction, but
apparently we currently don't CSE the kind of instructions for which
these fields could make a difference in the VEC4 back-end. That's
likely to change soon though when we start using send-from-GRF for
texture sampling and surface access messages.
Reviewed-by: Matt Turner <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_cse.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp index 9147c3cbb79..c9fe0cebf27 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp @@ -114,8 +114,16 @@ instructions_match(vec4_instruction *a, vec4_instruction *b) { return a->opcode == b->opcode && a->saturate == b->saturate && + a->predicate == b->predicate && + a->predicate_inverse == b->predicate_inverse && a->conditional_mod == b->conditional_mod && + a->flag_subreg == b->flag_subreg && a->dst.type == b->dst.type && + a->offset == b->offset && + a->mlen == b->mlen && + a->base_mrf == b->base_mrf && + a->header_size == b->header_size && + a->shadow_compare == b->shadow_compare && a->dst.writemask == b->dst.writemask && a->force_writemask_all == b->force_writemask_all && a->regs_written == b->regs_written && |