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authorTopi Pohjolainen <[email protected]>2015-03-19 10:42:49 +0200
committerTopi Pohjolainen <[email protected]>2015-04-30 00:28:47 +0300
commit21071afc431bb17419c353151544518be7daf05f (patch)
tree6c1ca4e47faa084e7f6fdb5d55384fdca8c3e3dd
parentc15e20d8f6f6d632ad55d444149c2a12d0dcc515 (diff)
i965: Refactor and expose brw_upload_binding_table()
Read and write parts of the state stage are also split into explicit arguments allowing future patches to use constant program data. v2 (Ken): s/BRW_NEW_WM_PROG_DATA/BRW_NEW_FS_PROG_DATA/ Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_binding_tables.c21
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h7
2 files changed, 21 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c
index 459165a5aeb..98ff0ddcd58 100644
--- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
@@ -50,15 +50,13 @@
* This copies brw_stage_state::surf_offset[] into the indirect state section
* of the batchbuffer (allocated by brw_state_batch()).
*/
-static void
+void
brw_upload_binding_table(struct brw_context *brw,
uint32_t packet_name,
GLbitfield brw_new_binding_table,
+ const struct brw_stage_prog_data *prog_data,
struct brw_stage_state *stage_state)
{
- /* BRW_NEW_*_PROG_DATA */
- struct brw_stage_prog_data *prog_data = stage_state->prog_data;
-
if (prog_data->binding_table.size_bytes == 0) {
/* There are no surfaces; skip making the binding table altogether. */
if (stage_state->bind_bo_offset == 0 && brw->gen < 9)
@@ -103,9 +101,12 @@ brw_upload_binding_table(struct brw_context *brw,
static void
brw_vs_upload_binding_table(struct brw_context *brw)
{
+ /* BRW_NEW_VS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data;
brw_upload_binding_table(brw,
_3DSTATE_BINDING_TABLE_POINTERS_VS,
- BRW_NEW_VS_BINDING_TABLE, &brw->vs.base);
+ BRW_NEW_VS_BINDING_TABLE, prog_data,
+ &brw->vs.base);
}
const struct brw_tracked_state brw_vs_binding_table = {
@@ -124,9 +125,12 @@ const struct brw_tracked_state brw_vs_binding_table = {
static void
brw_upload_wm_binding_table(struct brw_context *brw)
{
+ /* BRW_NEW_FS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data;
brw_upload_binding_table(brw,
_3DSTATE_BINDING_TABLE_POINTERS_PS,
- BRW_NEW_PS_BINDING_TABLE, &brw->wm.base);
+ BRW_NEW_PS_BINDING_TABLE, prog_data,
+ &brw->wm.base);
}
const struct brw_tracked_state brw_wm_binding_table = {
@@ -147,9 +151,12 @@ brw_gs_upload_binding_table(struct brw_context *brw)
if (brw->geometry_program == NULL)
return;
+ /* BRW_NEW_GS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data;
brw_upload_binding_table(brw,
_3DSTATE_BINDING_TABLE_POINTERS_GS,
- BRW_NEW_GS_BINDING_TABLE, &brw->gs.base);
+ BRW_NEW_GS_BINDING_TABLE, prog_data,
+ &brw->gs.base);
}
const struct brw_tracked_state brw_gs_binding_table = {
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 83058b9ba2a..8798369bf7b 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -159,6 +159,13 @@ brw_state_dirty(struct brw_context *brw, GLuint mesa_flags, uint64_t brw_flags)
(brw->ctx.NewDriverState & brw_flags)) != 0;
}
+/* brw_binding_tables.c */
+void brw_upload_binding_table(struct brw_context *brw,
+ uint32_t packet_name,
+ GLbitfield brw_new_binding_table,
+ const struct brw_stage_prog_data *prog_data,
+ struct brw_stage_state *stage_state);
+
/* brw_misc_state.c */
void brw_upload_invariant_state(struct brw_context *brw);
uint32_t