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authorSamuel Pitoiset <[email protected]>2016-04-26 00:15:25 +0200
committerSamuel Pitoiset <[email protected]>2016-04-26 00:32:25 +0200
commitd12c3b02ffdcb54fd3c919ab1d13603a793d20ef (patch)
treefa50c0a29bacf8ed7a760e4d503cad27fa6a156b
parent5b6a1aee4674d24d57fbbaac86619e429bd031e5 (diff)
nvc0: bump the amount of shared memory per MP on Maxwell
According to the CUDA compute capability version, GM10x can expose 64KB of shared memory while GM20x can use 96KB. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_screen.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 3bf98ad6a3b..3fe43099772 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -444,7 +444,17 @@ nvc0_screen_get_compute_param(struct pipe_screen *pscreen,
case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE: /* g[] */
RET((uint64_t []) { 1ULL << 40 });
case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE: /* s[] */
- RET((uint64_t []) { 48 << 10 });
+ switch (obj_class) {
+ case GM200_COMPUTE_CLASS:
+ RET((uint64_t []) { 96 << 10 });
+ break;
+ case GM107_COMPUTE_CLASS:
+ RET((uint64_t []) { 64 << 10 });
+ break;
+ default:
+ RET((uint64_t []) { 48 << 10 });
+ break;
+ }
case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE: /* l[] */
RET((uint64_t []) { 512 << 10 });
case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE: /* c[], arbitrary limit */