diff options
| author | Dave Airlie <[email protected]> | 2017-01-20 12:41:19 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-01-31 09:30:46 +1000 |
| commit | c9c8ae1fd36e0a630e7f5642c691bd3a9d771adc (patch) | |
| tree | f218215c455f2680194581480a41452024088cf0 | |
| parent | 77ec78669af92ddb71047724bbae038804456ec7 (diff) | |
radv: emit esgs itemsize register.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index ea1d10ee0be..ad28c93a512 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -525,6 +525,8 @@ radv_emit_hw_es(struct radv_cmd_buffer *cmd_buffer, ws->cs_add_buffer(cmd_buffer->cs, shader->bo, 8); + radeon_set_context_reg(cmd_buffer->cs, R_028AAC_VGT_ESGS_RING_ITEMSIZE, + shader->info.vs.esgs_itemsize / 4); radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B320_SPI_SHADER_PGM_LO_ES, 4); radeon_emit(cmd_buffer->cs, va >> 8); radeon_emit(cmd_buffer->cs, va >> 40); |