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authorKenneth Graunke <kenneth@whitecape.org>2013-04-30 17:54:23 -0700
committerKenneth Graunke <kenneth@whitecape.org>2013-07-18 10:45:49 -0700
commit2b5b436615f66adf0f49391c5b0dfd1c0c6e0ad4 (patch)
tree65f48f6b0e8c90e72c40f94324ec18c8b61663ed
parent4ef19f7fecbd96169e2b9039afc0168c7c2704cd (diff)
i965: Add MOCS shift and mask for SURFACE_STATE entries.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index fa257ac8daa..c6b8dabfcd1 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -551,6 +551,9 @@
#define GEN7_SURFACE_MIN_LOD_SHIFT 4
#define GEN7_SURFACE_MIN_LOD_MASK INTEL_MASK(7, 4)
+#define GEN7_SURFACE_MOCS_SHIFT 16
+#define GEN7_SURFACE_MOCS_MASK INTEL_MASK(19, 16)
+
/* Surface state DW6 */
#define GEN7_SURFACE_MCS_ENABLE (1 << 0)
#define GEN7_SURFACE_MCS_PITCH_SHIFT 3