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authorMarek Olšák <[email protected]>2014-08-18 23:14:34 +0200
committerMarek Olšák <[email protected]>2014-08-19 12:20:18 +0200
commitf62f88274ae31065eaa331ad4c6c4adc0870df5d (patch)
tree136e615f6d3503f72461cc87eed88a0e530cdf74
parent4be7ff5567fd200ab1a57c66f6003e99e2c5d7a7 (diff)
radeonsi: bump PRIMGROUP_SIZE for some cases
Recommended by hw people. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index f5d65508340..0f700a8c9eb 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -384,13 +384,16 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
{
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
unsigned prim = info->mode;
- unsigned primgroup_size = 64;
+ unsigned primgroup_size = 128; /* recommended without a GS */
/* SWITCH_ON_EOP(0) is always preferable. */
bool wd_switch_on_eop = false;
bool ia_switch_on_eop = false;
bool partial_vs_wave = false;
+ if (sctx->gs_shader)
+ primgroup_size = 64; /* recommended with a GS */
+
/* This is a hardware requirement. */
if ((rs && rs->line_stipple_enable) ||
(sctx->b.screen->debug_flags & DBG_SWITCH_ON_EOP)) {