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authorSamuel Pitoiset <[email protected]>2016-07-04 13:12:20 +0200
committerSamuel Pitoiset <[email protected]>2016-07-05 01:44:08 +0200
commitcb828b7b18d83cb2ea3dcaed54c1678616c56fc8 (patch)
tree552a8f6f837f97f45ef0648b01a25dc0f7d3b88c
parentac772b24a18bddc490dae171441795dedd85d7b2 (diff)
gm107/ir: fix sign bit emission for FADD32I
When emitting OP_SUB, the sign bit for FADD and FADD32I is not at the same position. It's at position 45 for FADD but 51 for FADD32I. This fixes the following piglit test: tests/spec/arb_fragment_program/fdo30337b.shader_test Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: <[email protected]>
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
index 2c5e8f69d13..f1ba27a1927 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
@@ -1234,6 +1234,9 @@ CodeEmitterGM107::emitFADD()
emitABS(0x2e, insn->src(0));
emitNEG(0x2d, insn->src(1));
emitFMZ(0x2c, 1);
+
+ if (insn->op == OP_SUB)
+ code[1] ^= 0x00002000;
} else {
emitInsn(0x08000000);
emitABS(0x39, insn->src(1));
@@ -1243,10 +1246,10 @@ CodeEmitterGM107::emitFADD()
emitNEG(0x35, insn->src(1));
emitCC (0x34);
emitIMMD(0x14, 32, insn->src(1));
- }
- if (insn->op == OP_SUB)
- code[1] ^= 0x00002000;
+ if (insn->op == OP_SUB)
+ code[1] ^= 0x00080000;
+ }
emitGPR(0x08, insn->src(0));
emitGPR(0x00, insn->def(0));