i965: Disassemble 3 src instructions' rep_ctrl field.

Reviewed-by: Kenneth Graunke <[email protected]>

2 files changed, 24 insertions, 6 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 913e04df868..d79e7503a69 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -740,7 +740,10 @@ static int src0_3src (FILE *file, struct brw_instruction *inst)
 	return 0;
     if (inst->bits2.da3src.src0_subreg_nr)
 	format (file, ".%d", inst->bits2.da3src.src0_subreg_nr);
-    string (file, "<4,4,1>");
+    if (inst->bits2.da3src.src0_rep_ctrl)
+       string (file, "<0,1,0>");
+    else
+       string (file, "<4,4,1>");
     err |= control (file, "src da16 reg type", three_source_reg_encoding,
                     inst->bits1.da3src.src_type, NULL);
     /*
@@ -792,7 +795,10 @@ static int src1_3src (FILE *file, struct brw_instruction *inst)
 	return 0;
     if (src1_subreg_nr)
 	format (file, ".%d", src1_subreg_nr);
-    string (file, "<4,4,1>");
+    if (inst->bits2.da3src.src1_rep_ctrl)
+       string (file, "<0,1,0>");
+    else
+       string (file, "<4,4,1>");
     err |= control (file, "src da16 reg type", three_source_reg_encoding,
                     inst->bits1.da3src.src_type, NULL);
     /*
@@ -843,7 +849,10 @@ static int src2_3src (FILE *file, struct brw_instruction *inst)
 	return 0;
     if (inst->bits3.da3src.src2_subreg_nr)
 	format (file, ".%d", inst->bits3.da3src.src2_subreg_nr);
-    string (file, "<4,4,1>");
+    if (inst->bits3.da3src.src2_rep_ctrl)
+       string (file, "<0,1,0>");
+    else
+       string (file, "<4,4,1>");
     err |= control (file, "src da16 reg type", three_source_reg_encoding,
                     inst->bits1.da3src.src_type, NULL);
     /*
diff --git a/src/mesa/drivers/dri/i965/gen8_disasm.c b/src/mesa/drivers/dri/i965/gen8_disasm.c
index 8a5d1e09217..cc3d8647822 100644
--- a/src/mesa/drivers/dri/i965/gen8_disasm.c
+++ b/src/mesa/drivers/dri/i965/gen8_disasm.c
@@ -569,7 +569,10 @@ src0_3src(FILE *file, struct gen8_instruction *inst)
       return 0;
    if (gen8_src0_3src_subreg_nr(inst))
       format(file, ".%d", gen8_src0_3src_subreg_nr(inst));
-   string(file, "<4,4,1>");
+   if (gen8_src0_3src_rep_ctrl(inst))
+      string(file, "<0,1,0>");
+   else
+      string(file, "<4,4,1>");
    err |= control(file, "src da16 reg type", m_three_source_reg_encoding,
                   gen8_src_3src_type(inst), NULL);
    err |= src_swizzle(file, swz_x, swz_y, swz_z, swz_w);
@@ -595,7 +598,10 @@ src1_3src(FILE *file, struct gen8_instruction *inst)
       return 0;
    if (src1_subreg_nr)
       format(file, ".%d", src1_subreg_nr);
-   string(file, "<4,4,1>");
+   if (gen8_src1_3src_rep_ctrl(inst))
+      string(file, "<0,1,0>");
+   else
+      string(file, "<4,4,1>");
    err |= control(file, "src da16 reg type", m_three_source_reg_encoding,
                   gen8_src_3src_type(inst), NULL);
    err |= src_swizzle(file, swz_x, swz_y, swz_z, swz_w);
@@ -620,7 +626,10 @@ src2_3src(FILE *file, struct gen8_instruction *inst)
       return 0;
    if (gen8_src2_3src_subreg_nr(inst))
       format(file, ".%d", gen8_src2_3src_subreg_nr(inst));
-   string(file, "<4,4,1>");
+   if (gen8_src2_3src_rep_ctrl(inst))
+      string(file, "<0,1,0>");
+   else
+      string(file, "<4,4,1>");
    err |= control(file, "src da16 reg type", m_three_source_reg_encoding,
                   gen8_src_3src_type(inst), NULL);
    err |= src_swizzle(file, swz_x, swz_y, swz_z, swz_w);