i965: Fix fallout from ARB_depth_clamp enablement that broke glDepthRange.

If a backwards glDepthRange was supplied (as with the old Quake no-z-clearing
hack), the hardware would have always clamped because we weren't clamping to
the min of near/far and the max of near/far.  Also, we shouldn't be clamping
to near/far at all when not in depth clamp mode (this usually didn't matter
since near/far are usually the same as the 0.0, 1.0 clamping you do for
fixed-point depth).

This should fix funny depth issues in PlaneShift, and fixes piglit
depth-clamp-range

1 files changed, 10 insertions, 4 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c
index 1088a7a6070..5cca605c3f1 100644
--- a/src/mesa/drivers/dri/i965/brw_cc.c
+++ b/src/mesa/drivers/dri/i965/brw_cc.c
@@ -44,9 +44,15 @@ static void prepare_cc_vp( struct brw_context *brw )
 
    memset(&ccv, 0, sizeof(ccv));
 
-   /* _NEW_VIEWPORT */
-   ccv.min_depth = ctx->Viewport.Near;
-   ccv.max_depth = ctx->Viewport.Far;
+   /* _NEW_TRANSOFORM */
+   if (ctx->Transform.DepthClamp) {
+      /* _NEW_VIEWPORT */
+      ccv.min_depth = MIN2(ctx->Viewport.Near, ctx->Viewport.Far);
+      ccv.max_depth = MAX2(ctx->Viewport.Near, ctx->Viewport.Far);
+   } else {
+      ccv.min_depth = 0.0;
+      ccv.max_depth = 1.0;
+   }
 
    dri_bo_unreference(brw->cc.vp_bo);
    brw->cc.vp_bo = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0 );
@@ -54,7 +60,7 @@ static void prepare_cc_vp( struct brw_context *brw )
 
 const struct brw_tracked_state brw_cc_vp = {
    .dirty = {
-      .mesa = _NEW_VIEWPORT,
+      .mesa = _NEW_VIEWPORT | _NEW_TRANSFORM,
       .brw = BRW_NEW_CONTEXT,
       .cache = 0
    },