diff options
author | Eric Anholt <[email protected]> | 2014-07-22 20:16:10 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2014-08-11 14:45:28 -0700 |
commit | 5e062cb2b4a44af7eb4ba38a8a8c3c506b22f0e2 (patch) | |
tree | e8a211ed99d44836eb429a6f3ba142d2e148ad6b | |
parent | 2b16b3d75fa9350e358e80a4189d4f592c7394d4 (diff) |
vc4: Rename fields in the kernel interface.
I decided I didn't like "len" compared to "size", and I keep typing
shader_rec instead of shader_record[s] elsewhere, so make it consistent.
-rw-r--r-- | src/gallium/drivers/vc4/vc4_context.c | 12 | ||||
-rw-r--r-- | src/gallium/drivers/vc4/vc4_drm.h | 16 | ||||
-rw-r--r-- | src/gallium/drivers/vc4/vc4_simulator.c | 36 |
3 files changed, 32 insertions, 32 deletions
diff --git a/src/gallium/drivers/vc4/vc4_context.c b/src/gallium/drivers/vc4/vc4_context.c index 08e85ed6312..c9129e7b457 100644 --- a/src/gallium/drivers/vc4/vc4_context.c +++ b/src/gallium/drivers/vc4/vc4_context.c @@ -101,14 +101,14 @@ vc4_flush(struct pipe_context *pctx) submit.bo_handle_count = (vc4->bo_handles.next - vc4->bo_handles.base) / 4; submit.bin_cl = vc4->bcl.base; - submit.bin_cl_len = vc4->bcl.next - vc4->bcl.base; + submit.bin_cl_size = vc4->bcl.next - vc4->bcl.base; submit.render_cl = vc4->rcl.base; - submit.render_cl_len = vc4->rcl.next - vc4->rcl.base; - submit.shader_records = vc4->shader_rec.base; - submit.shader_record_len = vc4->shader_rec.next - vc4->shader_rec.base; - submit.shader_record_count = vc4->shader_rec_count; + submit.render_cl_size = vc4->rcl.next - vc4->rcl.base; + submit.shader_rec = vc4->shader_rec.base; + submit.shader_rec_size = vc4->shader_rec.next - vc4->shader_rec.base; + submit.shader_rec_count = vc4->shader_rec_count; submit.uniforms = vc4->uniforms.base; - submit.uniforms_len = vc4->uniforms.next - vc4->uniforms.base; + submit.uniforms_size = vc4->uniforms.next - vc4->uniforms.base; if (!(vc4_debug & VC4_DEBUG_NORAST)) { int ret; diff --git a/src/gallium/drivers/vc4/vc4_drm.h b/src/gallium/drivers/vc4/vc4_drm.h index cc4c735d881..7d440742191 100644 --- a/src/gallium/drivers/vc4/vc4_drm.h +++ b/src/gallium/drivers/vc4/vc4_drm.h @@ -72,7 +72,7 @@ struct drm_vc4_submit_cl { * and an attribute count), so those BO indices into bo_handles are * just stored as uint32_ts before each shader record passed in. */ - void __user *shader_records; + void __user *shader_rec; /* Pointer to uniform data and texture handles for the textures * referenced by the shader. @@ -92,20 +92,20 @@ struct drm_vc4_submit_cl { void __user *bo_handles; /* Size in bytes of the binner command list. */ - uint32_t bin_cl_len; + uint32_t bin_cl_size; /* Size in bytes of the render command list */ - uint32_t render_cl_len; - /* Size in bytes of the list of shader records. */ - uint32_t shader_record_len; + uint32_t render_cl_size; + /* Size in bytes of the set of shader records. */ + uint32_t shader_rec_size; /* Number of shader records. * * This could just be computed from the contents of shader_records and * the address bits of references to them from the bin CL, but it * keeps the kernel from having to resize some allocations it makes. */ - uint32_t shader_record_count; - /** Size in bytes of the uniform state. */ - uint32_t uniforms_len; + uint32_t shader_rec_count; + /* Size in bytes of the uniform state. */ + uint32_t uniforms_size; /* Number of BO handles passed in (size is that times 4). */ uint32_t bo_handle_count; diff --git a/src/gallium/drivers/vc4/vc4_simulator.c b/src/gallium/drivers/vc4/vc4_simulator.c index 879a1a3802b..633e80995c1 100644 --- a/src/gallium/drivers/vc4/vc4_simulator.c +++ b/src/gallium/drivers/vc4/vc4_simulator.c @@ -108,18 +108,18 @@ vc4_cl_validate(struct drm_device *dev, struct exec_info *exec) void *bin, *render; int ret = 0; uint32_t bin_offset = 0; - uint32_t render_offset = bin_offset + args->bin_cl_len; + uint32_t render_offset = bin_offset + args->bin_cl_size; uint32_t shader_rec_offset = roundup(render_offset + - args->render_cl_len, 16); - uint32_t uniforms_offset = shader_rec_offset + args->shader_record_len; - uint32_t exec_size = uniforms_offset + args->uniforms_len; + args->render_cl_size, 16); + uint32_t uniforms_offset = shader_rec_offset + args->shader_rec_size; + uint32_t exec_size = uniforms_offset + args->uniforms_size; uint32_t temp_size = exec_size + (sizeof(struct vc4_shader_state) * - args->shader_record_count); + args->shader_rec_count); if (shader_rec_offset < render_offset || uniforms_offset < shader_rec_offset || exec_size < uniforms_offset || - args->shader_record_count >= (UINT_MAX / + args->shader_rec_count >= (UINT_MAX / sizeof(struct vc4_shader_state)) || temp_size < exec_size) { DRM_ERROR("overflow in exec arguments\n"); @@ -145,29 +145,29 @@ vc4_cl_validate(struct drm_device *dev, struct exec_info *exec) exec->shader_rec_u = temp + shader_rec_offset; exec->uniforms_u = temp + uniforms_offset; exec->shader_state = temp + exec_size; - exec->shader_state_size = args->shader_record_count; + exec->shader_state_size = args->shader_rec_count; - ret = copy_from_user(bin, args->bin_cl, args->bin_cl_len); + ret = copy_from_user(bin, args->bin_cl, args->bin_cl_size); if (ret) { DRM_ERROR("Failed to copy in bin cl\n"); goto fail; } - ret = copy_from_user(render, args->render_cl, args->render_cl_len); + ret = copy_from_user(render, args->render_cl, args->render_cl_size); if (ret) { DRM_ERROR("Failed to copy in render cl\n"); goto fail; } - ret = copy_from_user(exec->shader_rec_u, args->shader_records, - args->shader_record_len); + ret = copy_from_user(exec->shader_rec_u, args->shader_rec, + args->shader_rec_size); if (ret) { DRM_ERROR("Failed to copy in shader recs\n"); goto fail; } ret = copy_from_user(exec->uniforms_u, args->uniforms, - args->uniforms_len); + args->uniforms_size); if (ret) { DRM_ERROR("Failed to copy in uniforms cl\n"); goto fail; @@ -184,22 +184,22 @@ vc4_cl_validate(struct drm_device *dev, struct exec_info *exec) #endif exec->ct0ca = exec->exec_bo->paddr + bin_offset; - exec->ct0ea = exec->ct0ca + args->bin_cl_len; + exec->ct0ea = exec->ct0ca + args->bin_cl_size; exec->ct1ca = exec->exec_bo->paddr + render_offset; - exec->ct1ea = exec->ct1ca + args->render_cl_len; + exec->ct1ea = exec->ct1ca + args->render_cl_size; exec->shader_rec_v = exec->exec_bo->vaddr + shader_rec_offset; exec->shader_rec_p = exec->exec_bo->paddr + shader_rec_offset; - exec->shader_rec_size = args->shader_record_len; + exec->shader_rec_size = args->shader_rec_size; exec->uniforms_v = exec->exec_bo->vaddr + uniforms_offset; exec->uniforms_p = exec->exec_bo->paddr + uniforms_offset; - exec->uniforms_size = args->uniforms_len; + exec->uniforms_size = args->uniforms_size; ret = vc4_validate_cl(dev, exec->exec_bo->vaddr + bin_offset, bin, - args->bin_cl_len, + args->bin_cl_size, true, exec); if (ret) @@ -208,7 +208,7 @@ vc4_cl_validate(struct drm_device *dev, struct exec_info *exec) ret = vc4_validate_cl(dev, exec->exec_bo->vaddr + render_offset, render, - args->render_cl_len, + args->render_cl_size, false, exec); if (ret) |