diff options
author | Kenneth Graunke <kenneth@whitecape.org> | 2013-10-24 00:36:42 -0700 |
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committer | Kenneth Graunke <kenneth@whitecape.org> | 2013-10-28 11:29:29 -0700 |
commit | 3aef1fefb4dc2a66101725f2fdc3f2bb0eb926c2 (patch) | |
tree | 56b337d43ba26056d72aee81be44f0c1f1b451e6 | |
parent | 436e815a250a8fde22d79093f4b9eed56472693b (diff) |
i965: Emit post-sync non-zero flush before 3DSTATE_DRAWING_RECTANGLE.
This is another non-pipelined command that needs a flush on Sandybridge.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Xinkai Chen <yeled.nova@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_misc_state.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 5d1c27d8bab..70b0dbd4c00 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -48,6 +48,10 @@ static void upload_drawing_rect(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; + /* 3DSTATE_DRAWING_RECTANGLE is non-pipelined. */ + if (brw->gen == 6) + intel_emit_post_sync_nonzero_flush(brw); + BEGIN_BATCH(4); OUT_BATCH(_3DSTATE_DRAWING_RECTANGLE << 16 | (4 - 2)); OUT_BATCH(0); /* xmin, ymin */ |