nv50/ir: fix off-by-ones in CSE and nvc0 insnCanLoad

2 files changed, 2 insertions, 2 deletions

diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
index 29704c47f03..22a4f5a20a9 100644
--- a/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
@@ -2073,7 +2073,7 @@ LocalCSE::visit(BasicBlock *bb)
 
       // will need to know the order of instructions
       int serial = 0;
-      for (ir = bb->getEntry(); ir; ir = ir->next)
+      for (ir = bb->getFirst(); ir; ir = ir->next)
          ir->serial = serial++;
 
       for (ir = bb->getEntry(); ir; ir = next) {
diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
index 8f34cacd81b..04425623bdb 100644
--- a/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
@@ -394,7 +394,7 @@ TargetNVC0::insnCanLoad(const Instruction *i, int s,
    if (sf == FILE_IMMEDIATE && ld->getSrc(0)->reg.data.u64 == 0)
       return (!i->asTex() && i->op != OP_EXPORT && i->op != OP_STORE);
 
-   if (s > opInfo[i->op].srcNr)
+   if (s >= opInfo[i->op].srcNr)
       return false;
    if (!(opInfo[i->op].srcFiles[s] & (1 << (int)sf)))
       return false;