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authorMarek Olšák <[email protected]>2016-10-26 13:47:11 +0200
committerMarek Olšák <[email protected]>2016-11-01 22:33:13 +0100
commite3697b4be6667ca5da997ce4e204e071332f8ee2 (patch)
tree900f2c69fa898fd68c23e967de213652fe0ab444
parentbf4d102ea3419ade6759bf9c3ad9d40c7f9b3c27 (diff)
gallium/radeon: remove r600_surface::level_info
Reviewed-by: Nicolai Hähnle <[email protected]>
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.h1
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c2
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c10
3 files changed, 6 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index a33e290fabb..941fc377a51 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -306,7 +306,6 @@ struct r600_texture {
struct r600_surface {
struct pipe_surface base;
- const struct radeon_surf_level *level_info;
bool color_initialized;
bool depth_initialized;
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index ff45261014a..6c8d5a7c103 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1756,7 +1756,6 @@ struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe,
unsigned width, unsigned height)
{
struct r600_common_context *rctx = (struct r600_common_context*)pipe;
- struct r600_texture *rtex = (struct r600_texture*)texture;
struct r600_surface *surface = CALLOC_STRUCT(r600_surface);
if (!surface)
@@ -1772,7 +1771,6 @@ struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe,
surface->base.width = width;
surface->base.height = height;
surface->base.u = templ->u;
- surface->level_info = &rtex->surface.level[templ->u.tex.level];
if (texture->target != PIPE_BUFFER)
vi_dcc_disable_if_incompatible_format(rctx, texture,
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index ab3397c5f19..642ce79ab44 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2438,6 +2438,7 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom
/* Colorbuffers. */
for (i = 0; i < nr_cbufs; i++) {
+ const struct radeon_surf_level *level_info;
unsigned pitch_tile_max, slice_tile_max, tile_mode_index;
unsigned cb_color_base, cb_color_fmask, cb_color_attrib;
unsigned cb_color_pitch, cb_color_slice, cb_color_fmask_slice;
@@ -2453,6 +2454,7 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom
}
tex = (struct r600_texture *)cb->base.texture;
+ level_info = &tex->surface.level[cb->base.u.tex.level];
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
&tex->resource, RADEON_USAGE_READWRITE,
tex->resource.b.b.nr_samples > 1 ?
@@ -2472,12 +2474,12 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom
RADEON_PRIO_DCC);
/* Compute mutable surface parameters. */
- pitch_tile_max = cb->level_info->nblk_x / 8 - 1;
- slice_tile_max = cb->level_info->nblk_x *
- cb->level_info->nblk_y / 64 - 1;
+ pitch_tile_max = level_info->nblk_x / 8 - 1;
+ slice_tile_max = level_info->nblk_x *
+ level_info->nblk_y / 64 - 1;
tile_mode_index = si_tile_mode_index(tex, cb->base.u.tex.level, false);
- cb_color_base = (tex->resource.gpu_address + cb->level_info->offset) >> 8;
+ cb_color_base = (tex->resource.gpu_address + level_info->offset) >> 8;
cb_color_pitch = S_028C64_TILE_MAX(pitch_tile_max);
cb_color_slice = S_028C68_TILE_MAX(slice_tile_max);
cb_color_attrib = cb->cb_color_attrib |