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authorJason Ekstrand <jason.ekstrand@intel.com>2016-08-19 03:49:45 -0700
committerJason Ekstrand <jason.ekstrand@intel.com>2016-08-29 12:17:34 -0700
commitc8ff36228d6f5d48f700437e4a5520d8b6de13ab (patch)
tree0d451db6952564d0341290a71b5787759c3801c5
parent12a2fe538909991dc983de5b6573794ee574048d (diff)
i965: Roll brw_get_ccs_resolve_rect into blorp_ccs_resolve
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/blorp_clear.c32
-rw-r--r--src/mesa/drivers/dri/i965/brw_meta_util.c36
-rw-r--r--src/mesa/drivers/dri/i965/brw_meta_util.h6
3 files changed, 29 insertions, 45 deletions
diff --git a/src/mesa/drivers/dri/i965/blorp_clear.c b/src/mesa/drivers/dri/i965/blorp_clear.c
index 9f57d9a7775..60e40e9771e 100644
--- a/src/mesa/drivers/dri/i965/blorp_clear.c
+++ b/src/mesa/drivers/dri/i965/blorp_clear.c
@@ -171,9 +171,35 @@ brw_blorp_ccs_resolve(struct blorp_batch *batch,
brw_blorp_surface_info_init(batch->blorp, &params.dst, surf,
0 /* level */, 0 /* layer */, format, true);
- brw_get_ccs_resolve_rect(batch->blorp->isl_dev, &params.dst.aux_surf,
- &params.x0, &params.y0,
- &params.x1, &params.y1);
+ /* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
+ *
+ * A rectangle primitive must be scaled down by the following factors
+ * with respect to render target being resolved.
+ *
+ * The scaledown factors in the table that follows are related to the block
+ * size of the CCS format. For IVB and HSW, we divide by two, for BDW we
+ * multiply by 8 and 16. On Sky Lake, we multiply by 8.
+ */
+ const struct isl_format_layout *aux_fmtl =
+ isl_format_get_layout(params.dst.aux_surf.format);
+ assert(aux_fmtl->txc == ISL_TXC_CCS);
+
+ unsigned x_scaledown, y_scaledown;
+ if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 9) {
+ x_scaledown = aux_fmtl->bw * 8;
+ y_scaledown = aux_fmtl->bh * 8;
+ } else if (ISL_DEV_GEN(batch->blorp->isl_dev) >= 8) {
+ x_scaledown = aux_fmtl->bw * 8;
+ y_scaledown = aux_fmtl->bh * 16;
+ } else {
+ x_scaledown = aux_fmtl->bw / 2;
+ y_scaledown = aux_fmtl->bh / 2;
+ }
+ params.x0 = params.y0 = 0;
+ params.x1 = params.dst.aux_surf.logical_level0_px.width;
+ params.y1 = params.dst.aux_surf.logical_level0_px.height;
+ params.x1 = ALIGN(params.x1, x_scaledown) / x_scaledown;
+ params.y1 = ALIGN(params.y1, y_scaledown) / y_scaledown;
if (batch->blorp->isl_dev->info->gen >= 9) {
if (params.dst.aux_usage == ISL_AUX_USAGE_CCS_E)
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_util.c
index bc3a62d6319..52b7be4b693 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.c
@@ -563,39 +563,3 @@ brw_get_fast_clear_rect(const struct isl_device *dev,
*x1 = ALIGN(*x1, x_align) / x_scaledown;
*y1 = ALIGN(*y1, y_align) / y_scaledown;
}
-
-void
-brw_get_ccs_resolve_rect(const struct isl_device *dev,
- const struct isl_surf *ccs_surf,
- unsigned *x0, unsigned *y0,
- unsigned *x1, unsigned *y1)
-{
- unsigned x_scaledown, y_scaledown;
-
- /* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
- *
- * A rectangle primitive must be scaled down by the following factors
- * with respect to render target being resolved.
- *
- * The scaledown factors in the table that follows are related to the block
- * size of the CCS format. For IVB and HSW, we divide by two, for BDW we
- * multiply by 8 and 16. On Sky Lake, we multiply by 8.
- */
- const struct isl_format_layout *fmtl =
- isl_format_get_layout(ccs_surf->format);
- assert(fmtl->txc == ISL_TXC_CCS);
-
- if (ISL_DEV_GEN(dev) >= 9) {
- x_scaledown = fmtl->bw * 8;
- y_scaledown = fmtl->bh * 8;
- } else if (ISL_DEV_GEN(dev) >= 8) {
- x_scaledown = fmtl->bw * 8;
- y_scaledown = fmtl->bh * 16;
- } else {
- x_scaledown = fmtl->bw / 2;
- y_scaledown = fmtl->bh / 2;
- }
- *x0 = *y0 = 0;
- *x1 = ALIGN(ccs_surf->logical_level0_px.width, x_scaledown) / x_scaledown;
- *y1 = ALIGN(ccs_surf->logical_level0_px.height, y_scaledown) / y_scaledown;
-}
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.h b/src/mesa/drivers/dri/i965/brw_meta_util.h
index 79a777f991b..d5172373331 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.h
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.h
@@ -48,12 +48,6 @@ brw_get_fast_clear_rect(const struct isl_device *dev,
unsigned *x0, unsigned *y0,
unsigned *x1, unsigned *y1);
-void
-brw_get_ccs_resolve_rect(const struct isl_device *dev,
- const struct isl_surf *ccs_surf,
- unsigned *x0, unsigned *y0,
- unsigned *x1, unsigned *y1);
-
bool
brw_meta_set_fast_clear_color(struct brw_context *brw,
struct intel_mipmap_tree *mt,