diff options
| author | Stuart Abercrombie <[email protected]> | 2011-12-02 11:29:38 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2011-12-02 15:28:44 -0800 |
| commit | aa010157a3f4fa1be7b85d476538bd5496e91004 (patch) | |
| tree | 848ac21acdedca42488b3a56c224c9428aa8e850 | |
| parent | 079bb3fff7104782f2c921200e9a299c38a53ab6 (diff) | |
i965: Fix emit of a MOV with bad destination channel on gen6 math in FPs.
Previously a zero writemask would result in dst_chan == -1, meaning an
unnecessary MOV with the destination register dictated by undefined
memory contents would be emitted before returning. This caused
intermittent GPU hangs, e.g. with glean/texCombine.
Reviewed-by: Eric Anholt <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_emit.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index b5a4a4f34da..5905ba9cd40 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -888,6 +888,11 @@ void emit_math1(struct brw_wm_compile *c, BRW_MATH_SATURATE_NONE); struct brw_reg src; + if (!(mask & WRITEMASK_XYZW)) + return; /* Do not emit dead code */ + + assert(is_power_of_two(mask & WRITEMASK_XYZW)); + if (intel->gen >= 6 && ((arg0[0].hstride == BRW_HORIZONTAL_STRIDE_0 || arg0[0].file != BRW_GENERAL_REGISTER_FILE) || arg0[0].negate || arg0[0].abs)) { @@ -903,11 +908,6 @@ void emit_math1(struct brw_wm_compile *c, src = arg0[0]; } - if (!(mask & WRITEMASK_XYZW)) - return; /* Do not emit dead code */ - - assert(is_power_of_two(mask & WRITEMASK_XYZW)); - /* Send two messages to perform all 16 operations: */ brw_push_insn_state(p); |