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authorNicolai Hähnle <[email protected]>2017-05-10 22:14:39 +0200
committerDave Airlie <[email protected]>2017-06-05 10:43:53 +1000
commit59f72e158aa0349085ef25900eb1651aa67ec67f (patch)
tree9968d595d364f3c519714e18f611308281eb755f
parenta12d288bff2277c9343fa22dd138f49447a8e258 (diff)
radv: remove radeon_surf_level::pitch_bytes
Like radeonsi. This saves memory, and the information can easily be recomputed on the fly where necessary. Reviewed-by: Dave Airlie <[email protected]>
-rw-r--r--src/amd/vulkan/radv_image.c11
-rw-r--r--src/amd/vulkan/radv_private.h1
-rw-r--r--src/amd/vulkan/radv_radeon_winsys.h1
-rw-r--r--src/amd/vulkan/radv_wsi.c2
-rw-r--r--src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c1
5 files changed, 3 insertions, 13 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index d138988f56f..a1598fcbb7b 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -446,7 +446,7 @@ radv_init_metadata(struct radv_device *device,
metadata->tile_split = surface->tile_split;
metadata->mtilea = surface->mtilea;
metadata->num_banks = surface->num_banks;
- metadata->stride = surface->level[0].pitch_bytes;
+ metadata->stride = surface->level[0].nblk_x * surface->bpe;
metadata->scanout = (surface->flags & RADEON_SURF_SCANOUT) != 0;
radv_query_opaque_metadata(device, image, metadata);
@@ -677,13 +677,6 @@ radv_image_create(VkDevice _device,
radv_image_alloc_htile(device, image);
}
-
- if (create_info->stride && create_info->stride != image->surface.level[0].pitch_bytes) {
- image->surface.level[0].nblk_x = create_info->stride / image->surface.bpe;
- image->surface.level[0].pitch_bytes = create_info->stride;
- image->surface.level[0].slice_size = create_info->stride * image->surface.level[0].nblk_y;
- }
-
if (pCreateInfo->flags & VK_IMAGE_CREATE_SPARSE_BINDING_BIT) {
image->alignment = MAX2(image->alignment, 4096);
image->size = align64(image->size, image->alignment);
@@ -856,7 +849,7 @@ void radv_GetImageSubresourceLayout(
struct radeon_surf *surface = &image->surface;
pLayout->offset = surface->level[level].offset + surface->level[level].slice_size * layer;
- pLayout->rowPitch = surface->level[level].pitch_bytes;
+ pLayout->rowPitch = surface->level[level].nblk_x * surface->bpe;
pLayout->arrayPitch = surface->level[level].slice_size;
pLayout->depthPitch = surface->level[level].slice_size;
pLayout->size = surface->level[level].slice_size;
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index d64f8017e1a..c442f03ef89 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1262,7 +1262,6 @@ struct radv_image_view {
struct radv_image_create_info {
const VkImageCreateInfo *vk_info;
- uint32_t stride;
bool scanout;
};
diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h
index 84b1d73780b..df582d8c610 100644
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -170,7 +170,6 @@ struct radeon_surf_level {
uint32_t nblk_x;
uint32_t nblk_y;
uint32_t nblk_z;
- uint32_t pitch_bytes;
uint32_t mode;
bool dcc_enabled;
uint64_t dcc_offset;
diff --git a/src/amd/vulkan/radv_wsi.c b/src/amd/vulkan/radv_wsi.c
index 5e866126b91..d0ba37761ab 100644
--- a/src/amd/vulkan/radv_wsi.c
+++ b/src/amd/vulkan/radv_wsi.c
@@ -224,7 +224,7 @@ radv_wsi_image_create(VkDevice device_h,
*memory_p = memory_h;
*size = image->size;
*offset = image->offset;
- *row_pitch = surface->level[0].pitch_bytes;
+ *row_pitch = surface->level[0].nblk_x * surface->bpe;
return VK_SUCCESS;
fail_alloc_memory:
radv_FreeMemory(device_h, memory_h, pAllocator);
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
index c972ef110e7..f8e22da16b6 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
@@ -203,7 +203,6 @@ static int radv_compute_level(ADDR_HANDLE addrlib,
surf_level = is_stencil ? &surf->stencil_level[level] : &surf->level[level];
surf_level->offset = align64(surf->bo_size, AddrSurfInfoOut->baseAlign);
surf_level->slice_size = AddrSurfInfoOut->sliceSize;
- surf_level->pitch_bytes = AddrSurfInfoOut->pitch * (is_stencil ? 1 : surf->bpe);
surf_level->nblk_x = AddrSurfInfoOut->pitch;
surf_level->nblk_y = AddrSurfInfoOut->height;
if (type == RADEON_SURF_TYPE_3D)