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authorFrancisco Jerez <[email protected]>2015-02-03 21:57:38 +0200
committerFrancisco Jerez <[email protected]>2015-02-10 16:05:51 +0200
commit3df2cb2f863836ec909f5259693c1eeef675a594 (patch)
tree1995c0f57e2548a25a704bb892cb61c3b6c01c53
parentf2668f9f214201503419342b980d3afa8b796926 (diff)
i965/fs: Fix fs_inst::regs_written calculation for instructions with scalar dst.
Scalar registers are required to have zero stride, fix the regs_written calculation not to assume that the instruction writes zero registers in that case. v2: Rename CEILING() to DIV_ROUND_UP(). (Matt, Ken) Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 2f264255c07..f149ab5e6c1 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -126,7 +126,8 @@ fs_inst::init(enum opcode opcode, uint8_t exec_size, const fs_reg &dst,
case HW_REG:
case MRF:
case ATTR:
- this->regs_written = (dst.width * dst.stride * type_sz(dst.type) + 31) / 32;
+ this->regs_written =
+ DIV_ROUND_UP(MAX2(dst.width * dst.stride, 1) * type_sz(dst.type), 32);
break;
case BAD_FILE:
this->regs_written = 0;