diff options
| author | Timothy Arceri <[email protected]> | 2016-05-23 16:32:50 +1000 |
|---|---|---|
| committer | Timothy Arceri <[email protected]> | 2016-07-07 10:26:43 +1000 |
| commit | 2477e6cfada55563631c654fce9250e4fe276f0e (patch) | |
| tree | 2b27349b5d02289cb72e06793872b86b960e49ef | |
| parent | 2bda4b062f62edac1011bf65f410eeca176b5e23 (diff) | |
i965: add indirect packing support for tcs and tes
Reviewed-by: Kenneth Graunke <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 33 |
1 files changed, 29 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 2392ee5833f..8b0849a7957 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -2442,8 +2442,19 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld, const fs_reg srcs[] = { icp_handle, indirect_offset }; fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, 2); bld.LOAD_PAYLOAD(payload, srcs, ARRAY_SIZE(srcs), 0); - - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, payload); + if (first_component != 0) { + unsigned read_components = num_components + first_component; + fs_reg tmp = bld.vgrf(dst.type, read_components); + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, + payload); + for (unsigned i = 0; i < num_components; i++) { + bld.MOV(offset(dst, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dst, + payload); + } inst->offset = imm_offset; inst->mlen = 2; } @@ -2905,10 +2916,24 @@ fs_visitor::nir_emit_tes_intrinsic(const fs_builder &bld, fs_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, 2); bld.LOAD_PAYLOAD(payload, srcs, ARRAY_SIZE(srcs), 0); - inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dest, payload); + if (first_component != 0) { + unsigned read_components = + instr->num_components + first_component; + fs_reg tmp = bld.vgrf(dest.type, read_components); + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, tmp, + payload); + inst->regs_written = read_components; + for (unsigned i = 0; i < instr->num_components; i++) { + bld.MOV(offset(dest, bld, i), + offset(tmp, bld, i + first_component)); + } + } else { + inst = bld.emit(SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT, dest, + payload); + inst->regs_written = instr->num_components; + } inst->mlen = 2; inst->offset = imm_offset; - inst->regs_written = instr->num_components; } break; } |