freedreno/a6xx: cleanup rasterizer state

All but one of the reg values is only used in the stateobj, so we can
inline the register value setup and stateobj construction.  While we
are at it, switch over to the new register builders.

Prep work for next patch.

Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Kristian H. Kristensen <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3435>

2 files changed, 54 insertions, 89 deletions

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c
index 1800ecbc867..cc8b52c6a9f 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.c
@@ -33,21 +33,15 @@
 #include "fd6_rasterizer.h"
 #include "fd6_context.h"
 #include "fd6_format.h"
+#include "fd6_pack.h"
 
-void *
-fd6_rasterizer_state_create(struct pipe_context *pctx,
+static struct fd_ringbuffer *
+setup_rasterizer_stateobj(struct fd_context *ctx,
 		const struct pipe_rasterizer_state *cso)
 {
-	struct fd_context *ctx = fd_context(pctx);
-	struct fd6_rasterizer_stateobj *so;
+	struct fd_ringbuffer *ring = fd_ringbuffer_new_object(ctx->pipe, 12 * 4);
 	float psize_min, psize_max;
 
-	so = CALLOC_STRUCT(fd6_rasterizer_stateobj);
-	if (!so)
-		return NULL;
-
-	so->base = *cso;
-
 	if (cso->point_size_per_vertex) {
 		psize_min = util_get_min_point_size(cso);
 		psize_max = 4092;
@@ -57,80 +51,60 @@ fd6_rasterizer_state_create(struct pipe_context *pctx,
 		psize_max = cso->point_size;
 	}
 
-	so->gras_su_point_minmax =
-			A6XX_GRAS_SU_POINT_MINMAX_MIN(psize_min) |
-			A6XX_GRAS_SU_POINT_MINMAX_MAX(psize_max);
-	so->gras_su_point_size   = A6XX_GRAS_SU_POINT_SIZE(cso->point_size);
-	so->gras_su_poly_offset_scale =
-			A6XX_GRAS_SU_POLY_OFFSET_SCALE(cso->offset_scale);
-	so->gras_su_poly_offset_offset =
-			A6XX_GRAS_SU_POLY_OFFSET_OFFSET(cso->offset_units);
-	so->gras_su_poly_offset_clamp =
-			A6XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(cso->offset_clamp);
-
-	so->gras_su_cntl =
-			A6XX_GRAS_SU_CNTL_LINEHALFWIDTH(cso->line_width/2.0) |
-			COND(cso->multisample, A6XX_GRAS_SU_CNTL_MSAA_ENABLE);
-
-#if 0
-	so->pc_raster_cntl =
-		A6XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE(fd_polygon_mode(cso->fill_front)) |
-		A6XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE(fd_polygon_mode(cso->fill_back));
-#endif
-
-#if 0
-	if (cso->fill_front != PIPE_POLYGON_MODE_FILL ||
-		cso->fill_back != PIPE_POLYGON_MODE_FILL)
-		so->pc_raster_cntl |= A6XX_PC_RASTER_CNTL_POLYMODE_ENABLE;
-#endif
-
-	if (cso->cull_face & PIPE_FACE_FRONT)
-		so->gras_su_cntl |= A6XX_GRAS_SU_CNTL_CULL_FRONT;
-	if (cso->cull_face & PIPE_FACE_BACK)
-		so->gras_su_cntl |= A6XX_GRAS_SU_CNTL_CULL_BACK;
-	if (!cso->front_ccw)
-		so->gras_su_cntl |= A6XX_GRAS_SU_CNTL_FRONT_CW;
-	if (cso->offset_tri)
-		so->gras_su_cntl |= A6XX_GRAS_SU_CNTL_POLY_OFFSET;
+	OUT_REG(ring,
+		A6XX_GRAS_UNKNOWN_8000(.unknown = 0x80),
+		A6XX_GRAS_UNKNOWN_8001());
+
+	OUT_REG(ring,
+		A6XX_GRAS_SU_CNTL(
+			.linehalfwidth = cso->line_width / 2.0,
+			.poly_offset = cso->offset_tri,
+			.msaa_enable = cso->multisample,
+			.cull_front = cso->cull_face & PIPE_FACE_FRONT,
+			.cull_back = cso->cull_face & PIPE_FACE_BACK,
+			.front_cw = !cso->front_ccw,
+		));
+
+	OUT_REG(ring,
+		A6XX_GRAS_SU_POINT_MINMAX(
+			.min = psize_min,
+			.max = psize_max,
+		),
+		A6XX_GRAS_SU_POINT_SIZE(
+			cso->point_size
+		));
+
+	OUT_REG(ring,
+		A6XX_GRAS_SU_POLY_OFFSET_SCALE(
+			cso->offset_scale
+		),
+		A6XX_GRAS_SU_POLY_OFFSET_OFFSET(
+			cso->offset_units
+		),
+		A6XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(
+			cso->offset_clamp
+		));
+
+	return ring;
+}
+
+void *
+fd6_rasterizer_state_create(struct pipe_context *pctx,
+		const struct pipe_rasterizer_state *cso)
+{
+	struct fd_context *ctx = fd_context(pctx);
+	struct fd6_rasterizer_stateobj *so;
+
+	so = CALLOC_STRUCT(fd6_rasterizer_stateobj);
+	if (!so)
+		return NULL;
+
+	so->base = *cso;
 
 	if (!cso->flatshade_first)
 		so->pc_primitive_cntl |= A6XX_PC_PRIMITIVE_CNTL_0_PROVOKING_VTX_LAST;
 
-//	if (!cso->depth_clip)
-//		so->gras_cl_clip_cntl |= A6XX_GRAS_CL_CLIP_CNTL_ZNEAR_CLIP_DISABLE |
-//			A6XX_GRAS_CL_CLIP_CNTL_ZFAR_CLIP_DISABLE;
-#if 0
-	if (cso->clip_halfz)
-		so->gras_cl_clip_cntl |= A6XX_GRAS_CL_CNTL_ZERO_GB_SCALE_Z;
-#endif
-
-	so->stateobj = fd_ringbuffer_new_object(ctx->pipe, 15 * 4);
-	struct fd_ringbuffer *ring = so->stateobj;
-
-	OUT_PKT4(ring, REG_A6XX_GRAS_UNKNOWN_8000, 1);
-	OUT_RING(ring, 0x80);
-	OUT_PKT4(ring, REG_A6XX_GRAS_UNKNOWN_8001, 1);
-	OUT_RING(ring, 0x0);
-
-	OUT_PKT4(ring, REG_A6XX_GRAS_SU_CNTL, 1);
-	OUT_RING(ring, so->gras_su_cntl);
-
-	OUT_PKT4(ring, REG_A6XX_GRAS_SU_POINT_MINMAX, 2);
-	OUT_RING(ring, so->gras_su_point_minmax);
-	OUT_RING(ring, so->gras_su_point_size);
-
-	OUT_PKT4(ring, REG_A6XX_GRAS_SU_POLY_OFFSET_SCALE, 3);
-	OUT_RING(ring, so->gras_su_poly_offset_scale);
-	OUT_RING(ring, so->gras_su_poly_offset_offset);
-	OUT_RING(ring, so->gras_su_poly_offset_clamp);
-
-#if 0
-	OUT_PKT4(ring, REG_A6XX_PC_RASTER_CNTL, 1);
-	OUT_RING(ring, so->pc_raster_cntl);
-
-	OUT_PKT4(ring, REG_A6XX_GRAS_CL_CNTL, 1);
-	OUT_RING(ring, so->gras_cl_clip_cntl);
-#endif
+	so->stateobj = setup_rasterizer_stateobj(ctx, cso);
 
 	return so;
 }
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.h b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.h
index 1fecfb6cd83..afce6713b72 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_rasterizer.h
@@ -34,16 +34,7 @@
 struct fd6_rasterizer_stateobj {
 	struct pipe_rasterizer_state base;
 
-	uint32_t gras_su_point_minmax;
-	uint32_t gras_su_point_size;
-	uint32_t gras_su_poly_offset_scale;
-	uint32_t gras_su_poly_offset_offset;
-	uint32_t gras_su_poly_offset_clamp;
-
-	uint32_t gras_su_cntl;
-	uint32_t gras_cl_clip_cntl;
 	uint32_t pc_primitive_cntl;
-	uint32_t pc_raster_cntl;
 
 	struct fd_ringbuffer *stateobj;
 };