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authorMarek Olšák <[email protected]>2014-10-22 23:22:16 +0200
committerMarek Olšák <[email protected]>2014-10-28 23:20:45 +0100
commite05259b63745533231d7094967e7e1066a0e0851 (patch)
tree9f5325e4efc5ff63ee8f9a9df4b73dcb641bf0cb
parent72424061e0722a1444b62af4cdbf03aaaf7e5ee0 (diff)
radeonsi: fix incorrect index buffer max size for lowered 8-bit indices
Cc: 10.2 10.3 [email protected] Reviewed-by: Michel Dänzer <[email protected]>
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 4f81dacadb5..708e42aed26 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -750,7 +750,7 @@ static void si_state_draw(struct si_context *sctx,
if (info->indexed) {
uint32_t max_size = (ib->buffer->width0 - ib->offset) /
- sctx->index_buffer.index_size;
+ ib->index_size;
uint64_t va = r600_resource(ib->buffer)->gpu_address + ib->offset;
si_pm4_add_bo(pm4, (struct r600_resource *)ib->buffer, RADEON_USAGE_READ,