diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2016-03-28 03:01:56 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2016-04-19 18:10:31 +0200 |
| commit | da88c2a8e85350875aa60ef9cd2442666b2109ec (patch) | |
| tree | 90164eafec5506d31d6d892cef27babe7b3d3e50 | |
| parent | b082147b788ee45862f8d1b0e1b47478d6b99447 (diff) | |
radeonsi: set maximum work group size based on block size
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index f63ad2b32e0..605b964d379 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -5065,6 +5065,18 @@ static void create_function(struct si_shader_context *ctx) S_0286D0_LINEAR_CENTROID_ENA(1) | S_0286D0_FRONT_FACE_ENA(1) | S_0286D0_POS_FIXED_PT_ENA(1)); + } else if (ctx->type == TGSI_PROCESSOR_COMPUTE) { + const unsigned *properties = shader->selector->info.properties; + unsigned max_work_group_size = + properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] * + properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT] * + properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH]; + + assert(max_work_group_size); + + radeon_llvm_add_attribute(ctx->radeon_bld.main_fn, + "amdgpu-max-work-group-size", + max_work_group_size); } shader->info.num_input_sgprs = 0; |