diff options
author | Chia-I Wu <[email protected]> | 2014-10-29 09:57:01 +0800 |
---|---|---|
committer | Chia-I Wu <[email protected]> | 2014-11-06 10:43:53 +0800 |
commit | a1a701877a3160f7e076c3d62565c08cbf32e920 (patch) | |
tree | c63fe505298952f870a569fa0014e09fb0edb4c5 | |
parent | 9dd596c99f009258b964704f53ab97458a1ef733 (diff) |
ilo: add ilo_render_emit_launch_grid()
ilo_render_emit_launch_grid() emits all the hardware states needed for a
launch_grid() call.
Signed-off-by: Chia-I Wu <[email protected]>
-rw-r--r-- | src/gallium/drivers/ilo/Makefile.sources | 1 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/ilo_builder_render.h | 13 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/ilo_render.c | 39 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/ilo_render.h | 14 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/ilo_render_dynamic.c | 106 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/ilo_render_gen.h | 47 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/ilo_render_media.c | 229 | ||||
-rw-r--r-- | src/gallium/drivers/ilo/ilo_render_surface.c | 174 |
8 files changed, 621 insertions, 2 deletions
diff --git a/src/gallium/drivers/ilo/Makefile.sources b/src/gallium/drivers/ilo/Makefile.sources index 52f4ff25987..85ce3df931d 100644 --- a/src/gallium/drivers/ilo/Makefile.sources +++ b/src/gallium/drivers/ilo/Makefile.sources @@ -40,6 +40,7 @@ C_SOURCES := \ ilo_render_dynamic.c \ ilo_render_gen6.c \ ilo_render_gen7.c \ + ilo_render_media.c \ ilo_render_surface.c \ ilo_screen.c \ ilo_screen.h \ diff --git a/src/gallium/drivers/ilo/ilo_builder_render.h b/src/gallium/drivers/ilo/ilo_builder_render.h index f8a983883ac..aa09c877f62 100644 --- a/src/gallium/drivers/ilo/ilo_builder_render.h +++ b/src/gallium/drivers/ilo/ilo_builder_render.h @@ -57,8 +57,17 @@ gen6_PIPELINE_SELECT(struct ilo_builder *builder, int pipeline) ILO_DEV_ASSERT(builder->dev, 6, 7.5); - /* 3D or media */ - assert(pipeline == 0x0 || pipeline == 0x1); + switch (pipeline) { + case GEN6_PIPELINE_SELECT_DW0_SELECT_3D: + case GEN6_PIPELINE_SELECT_DW0_SELECT_MEDIA: + break; + case GEN7_PIPELINE_SELECT_DW0_SELECT_GPGPU: + assert(ilo_dev_gen(builder->dev) >= ILO_GEN(7)); + break; + default: + assert(!"unknown pipeline"); + break; + } ilo_builder_batch_write(builder, cmd_len, &dw0); } diff --git a/src/gallium/drivers/ilo/ilo_render.c b/src/gallium/drivers/ilo/ilo_render.c index 945d4cdb5aa..00b57b808ad 100644 --- a/src/gallium/drivers/ilo/ilo_render.c +++ b/src/gallium/drivers/ilo/ilo_render.c @@ -456,3 +456,42 @@ ilo_render_emit_draw(struct ilo_render *render, draw_session_end(render, vec, &session); } + +int +ilo_render_get_launch_grid_len(const struct ilo_render *render, + const struct ilo_state_vector *vec) +{ + ILO_DEV_ASSERT(render->dev, 7, 7.5); + + return ilo_render_get_launch_grid_surface_states_len(render, vec) + + ilo_render_get_launch_grid_dynamic_states_len(render, vec) + + ilo_render_get_launch_grid_commands_len(render, vec); +} + +void +ilo_render_emit_launch_grid(struct ilo_render *render, + const struct ilo_state_vector *vec, + const unsigned thread_group_offset[3], + const unsigned thread_group_dim[3], + unsigned thread_group_size, + const struct pipe_constant_buffer *input, + uint32_t pc) +{ + struct ilo_render_launch_grid_session session; + + ILO_DEV_ASSERT(render->dev, 7, 7.5); + + assert(input->buffer); + + memset(&session, 0, sizeof(session)); + + session.thread_group_offset = thread_group_offset; + session.thread_group_dim = thread_group_dim; + session.thread_group_size = thread_group_size; + session.input = input; + session.pc = pc; + + ilo_render_emit_launch_grid_surface_states(render, vec, &session); + ilo_render_emit_launch_grid_dynamic_states(render, vec, &session); + ilo_render_emit_launch_grid_commands(render, vec, &session); +} diff --git a/src/gallium/drivers/ilo/ilo_render.h b/src/gallium/drivers/ilo/ilo_render.h index 0cf1d0311b0..a85b2800fb1 100644 --- a/src/gallium/drivers/ilo/ilo_render.h +++ b/src/gallium/drivers/ilo/ilo_render.h @@ -30,6 +30,7 @@ #include "ilo_common.h" +struct pipe_constant_buffer; struct ilo_blitter; struct ilo_builder; struct ilo_query; @@ -87,4 +88,17 @@ void ilo_render_emit_draw(struct ilo_render *render, const struct ilo_state_vector *vec); +int +ilo_render_get_launch_grid_len(const struct ilo_render *render, + const struct ilo_state_vector *vec); + +void +ilo_render_emit_launch_grid(struct ilo_render *render, + const struct ilo_state_vector *vec, + const unsigned thread_group_offset[3], + const unsigned thread_group_dim[3], + unsigned thread_group_size, + const struct pipe_constant_buffer *input, + uint32_t pc); + #endif /* ILO_RENDER_H */ diff --git a/src/gallium/drivers/ilo/ilo_render_dynamic.c b/src/gallium/drivers/ilo/ilo_render_dynamic.c index 5c3687318b8..07d5664fe39 100644 --- a/src/gallium/drivers/ilo/ilo_render_dynamic.c +++ b/src/gallium/drivers/ilo/ilo_render_dynamic.c @@ -28,6 +28,7 @@ #include "ilo_common.h" #include "ilo_blitter.h" #include "ilo_builder_3d.h" +#include "ilo_builder_media.h" #include "ilo_state.h" #include "ilo_render_gen.h" @@ -440,3 +441,108 @@ ilo_render_emit_rectlist_dynamic_states(struct ilo_render *render, assert(ilo_builder_dynamic_used(render->builder) <= dynamic_used + ilo_render_get_rectlist_dynamic_states_len(render, blitter)); } + +static void +gen6_emit_launch_grid_dynamic_samplers(struct ilo_render *r, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + const unsigned shader_type = PIPE_SHADER_COMPUTE; + const struct ilo_shader_state *cs = vec->cs; + const struct ilo_sampler_cso * const *samplers = + vec->sampler[shader_type].cso; + const struct pipe_sampler_view * const *views = + (const struct pipe_sampler_view **) vec->view[shader_type].states; + int sampler_count, i; + + ILO_DEV_ASSERT(r->dev, 7, 7.5); + + sampler_count = ilo_shader_get_kernel_param(cs, ILO_KERNEL_SAMPLER_COUNT); + + assert(sampler_count <= Elements(vec->view[shader_type].states) && + sampler_count <= Elements(vec->sampler[shader_type].cso)); + + for (i = 0; i < sampler_count; i++) { + r->state.cs.SAMPLER_BORDER_COLOR_STATE[i] = (samplers[i]) ? + gen6_SAMPLER_BORDER_COLOR_STATE(r->builder, samplers[i]) : 0; + } + + r->state.cs.SAMPLER_STATE = gen6_SAMPLER_STATE(r->builder, samplers, views, + r->state.cs.SAMPLER_BORDER_COLOR_STATE, sampler_count); +} + +static void +gen6_emit_launch_grid_dynamic_pcb(struct ilo_render *r, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + r->state.cs.PUSH_CONSTANT_BUFFER = 0; + r->state.cs.PUSH_CONSTANT_BUFFER_size = 0; +} + +static void +gen6_emit_launch_grid_dynamic_idrt(struct ilo_render *r, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + const struct ilo_shader_state *cs = vec->cs; + struct gen6_idrt_data data; + + ILO_DEV_ASSERT(r->dev, 7, 7.5); + + memset(&data, 0, sizeof(data)); + + data.cs = cs; + data.sampler_offset = r->state.cs.SAMPLER_STATE; + data.binding_table_offset = r->state.cs.BINDING_TABLE_STATE; + + data.curbe_size = r->state.cs.PUSH_CONSTANT_BUFFER_size; + data.thread_group_size = session->thread_group_size; + + session->idrt = gen6_INTERFACE_DESCRIPTOR_DATA(r->builder, &data, 1); + session->idrt_size = 32; +} + +int +ilo_render_get_launch_grid_dynamic_states_len(const struct ilo_render *render, + const struct ilo_state_vector *vec) +{ + const int alignment = 32 / 4; + int num_samplers; + int len = 0; + + ILO_DEV_ASSERT(render->dev, 7, 7.5); + + num_samplers = ilo_shader_get_kernel_param(vec->cs, + ILO_KERNEL_SAMPLER_COUNT); + + /* SAMPLER_STATE array and SAMPLER_BORDER_COLORs */ + if (num_samplers) { + /* prefetches are done in multiples of 4 */ + num_samplers = align(num_samplers, 4); + + len += align(GEN6_SAMPLER_STATE__SIZE * num_samplers, alignment) + + align(GEN6_SAMPLER_BORDER_COLOR__SIZE, alignment) * num_samplers; + } + + len += GEN6_INTERFACE_DESCRIPTOR_DATA__SIZE; + + return len; +} + +void +ilo_render_emit_launch_grid_dynamic_states(struct ilo_render *render, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + const unsigned dynamic_used = ilo_builder_dynamic_used(render->builder); + + ILO_DEV_ASSERT(render->dev, 7, 7.5); + + gen6_emit_launch_grid_dynamic_samplers(render, vec, session); + gen6_emit_launch_grid_dynamic_pcb(render, vec, session); + gen6_emit_launch_grid_dynamic_idrt(render, vec, session); + + assert(ilo_builder_dynamic_used(render->builder) <= dynamic_used + + ilo_render_get_launch_grid_dynamic_states_len(render, vec)); +} diff --git a/src/gallium/drivers/ilo/ilo_render_gen.h b/src/gallium/drivers/ilo/ilo_render_gen.h index 32d1237c18e..28d5030b9ae 100644 --- a/src/gallium/drivers/ilo/ilo_render_gen.h +++ b/src/gallium/drivers/ilo/ilo_render_gen.h @@ -118,6 +118,15 @@ struct ilo_render { uint32_t PUSH_CONSTANT_BUFFER; int PUSH_CONSTANT_BUFFER_size; } wm; + + struct { + uint32_t BINDING_TABLE_STATE; + uint32_t SURFACE_STATE[ILO_MAX_SURFACES]; + uint32_t SAMPLER_STATE; + uint32_t SAMPLER_BORDER_COLOR_STATE[ILO_MAX_SAMPLERS]; + uint32_t PUSH_CONSTANT_BUFFER; + int PUSH_CONSTANT_BUFFER_size; + } cs; } state; }; @@ -157,6 +166,17 @@ struct ilo_render_rectlist_session { uint32_t vb_end; }; +struct ilo_render_launch_grid_session { + const unsigned *thread_group_offset; + const unsigned *thread_group_dim; + unsigned thread_group_size; + const struct pipe_constant_buffer *input; + uint32_t pc; + + uint32_t idrt; + int idrt_size; +}; + int ilo_render_get_draw_commands_len_gen6(const struct ilo_render *render, const struct ilo_state_vector *vec); @@ -239,6 +259,15 @@ ilo_render_emit_rectlist_commands(struct ilo_render *render, } int +ilo_render_get_launch_grid_commands_len(const struct ilo_render *render, + const struct ilo_state_vector *vec); + +void +ilo_render_emit_launch_grid_commands(struct ilo_render *render, + const struct ilo_state_vector *vec, + const struct ilo_render_launch_grid_session *session); + +int ilo_render_get_draw_dynamic_states_len(const struct ilo_render *render, const struct ilo_state_vector *vec); @@ -257,6 +286,15 @@ ilo_render_emit_rectlist_dynamic_states(struct ilo_render *render, struct ilo_render_rectlist_session *session); int +ilo_render_get_launch_grid_dynamic_states_len(const struct ilo_render *render, + const struct ilo_state_vector *vec); + +void +ilo_render_emit_launch_grid_dynamic_states(struct ilo_render *render, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session); + +int ilo_render_get_draw_surface_states_len(const struct ilo_render *render, const struct ilo_state_vector *vec); @@ -265,6 +303,15 @@ ilo_render_emit_draw_surface_states(struct ilo_render *render, const struct ilo_state_vector *vec, struct ilo_render_draw_session *session); +int +ilo_render_get_launch_grid_surface_states_len(const struct ilo_render *render, + const struct ilo_state_vector *vec); + +void +ilo_render_emit_launch_grid_surface_states(struct ilo_render *render, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session); + void gen6_wa_pre_pipe_control(struct ilo_render *r, uint32_t dw1); diff --git a/src/gallium/drivers/ilo/ilo_render_media.c b/src/gallium/drivers/ilo/ilo_render_media.c new file mode 100644 index 00000000000..f6b466c2996 --- /dev/null +++ b/src/gallium/drivers/ilo/ilo_render_media.c @@ -0,0 +1,229 @@ +/* + * Mesa 3-D graphics library + * + * Copyright (C) 2014 LunarG, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Chia-I Wu <[email protected]> + */ + +#include "genhw/genhw.h" + +#include "ilo_builder_media.h" +#include "ilo_builder_mi.h" +#include "ilo_builder_render.h" +#include "ilo_state.h" +#include "ilo_render_gen.h" + +struct gen7_l3_config { + int slm; + int urb; + int rest; + int dc; + int ro; + int is; + int c; + int t; +}; + +/* + * From the Ivy Bridge PRM, volume 1 part 7, page 10: + * + * "Normal L3/URB mode (non-SLM mode), uses all 4 banks of L3 equally to + * distribute cycles. The following allocation is a suggested programming + * model. Note all numbers below are given in KBytes." + * + * From the Haswell PRM, volume 7, page 662: + * + * "The configuration for {SLM = 0,URB = 224,DC = 32,RO = 256,IS = 0,C = + * 0,T =0, SUM 512} was validated as a later supported configuration and + * can be utilized if desired." + */ +static const struct gen7_l3_config gen7_l3_non_slm_configs[] = { + /* SLM URB Rest DC RO I/S C T */ + [0] = { 0, 256, 0, 0, 256, 0, 0, 0, }, + [1] = { 0, 256, 0, 128, 128, 0, 0, 0, }, + [2] = { 0, 256, 0, 32, 0, 64, 32, 128, }, + [3] = { 0, 224, 0, 64, 0, 64, 32, 128, }, + [4] = { 0, 224, 0, 128, 0, 64, 32, 64, }, + [5] = { 0, 224, 0, 64, 0, 128, 32, 64, }, + [6] = { 0, 224, 0, 0, 0, 128, 32, 128, }, + [7] = { 0, 256, 0, 0, 0, 128, 0, 128, }, + + [8] = { 0, 224, 0, 32, 256, 0, 0, 0, }, +}; + +/* + * From the Ivy Bridge PRM, volume 1 part 7, page 11: + * + * "With the existence of Shared Local Memory, a 64KB chunk from each of + * the 2 L3 banks will be reserved for SLM usage. The remaining cache + * space is divided between the remaining clients. SLM allocation is done + * via reducing the number of ways on the two banks from 64 to 32." + * + * From the Haswell PRM, volume 7, page 662: + * + * "The configuration for {SLM = 128,URB = 128,DC = 0,RO = 256,IS = 0,C = + * 0,T =0, SUM 512} was validated as a later supported configuration and + * can be utilized if desired. For this configuration, global atomics + * must be programmed to be in GTI." + */ +static const struct gen7_l3_config gen7_l3_slm_configs[] = { + /* SLM URB Rest DC RO I/S C T */ + [0] = { 128, 128, 0, 128, 128, 0, 0, 0, }, + [1] = { 128, 128, 0, 64, 0, 64, 64, 64, }, + [2] = { 128, 128, 0, 32, 0, 64, 32, 128, }, + [3] = { 128, 128, 0, 32, 0, 128, 32, 64, }, + + [4] = { 128, 128, 0, 0, 256, 0, 0, 0, }, +}; + +static void +gen7_launch_grid_l3(struct ilo_render *r, bool use_slm) +{ + uint32_t l3sqcreg1, l3cntlreg2, l3cntlreg3; + const struct gen7_l3_config *conf; + + /* + * This function mostly follows what beignet does. I do not know why, for + * example, CON4DCUNC should be reset. I do not know if it should be set + * again after launch_grid(). + */ + + ILO_DEV_ASSERT(r->dev, 7, 7.5); + + if (use_slm) + conf = &gen7_l3_slm_configs[1]; + else + conf = &gen7_l3_non_slm_configs[4]; + + /* unset GEN7_REG_L3SQCREG1_CON4DCUNC (without readback first) */ + if (ilo_dev_gen(r->dev) >= ILO_GEN(7.5)) { + l3sqcreg1 = GEN75_REG_L3SQCREG1_SQGPCI_24 | + GEN75_REG_L3SQCREG1_SQHPCI_8; + } else { + l3sqcreg1 = GEN7_REG_L3SQCREG1_SQGHPCI_18_6; + } + + l3cntlreg2 = (conf->dc / 8) << GEN7_REG_L3CNTLREG2_DCWASS__SHIFT | + (conf->ro / 8) << GEN7_REG_L3CNTLREG2_RDOCPL__SHIFT | + (conf->urb / 8) << GEN7_REG_L3CNTLREG2_URBALL__SHIFT; + + l3cntlreg3 = (conf->t / 8) << GEN7_REG_L3CNTLREG3_TXWYALL__SHIFT | + (conf->c / 8) << GEN7_REG_L3CNTLREG3_CTWYALL__SHIFT | + (conf->is / 8) << GEN7_REG_L3CNTLREG3_ISWYALL__SHIFT; + + if (conf->slm) { + /* + * From the Ivy Bridge PRM, volume 1 part 7, page 11: + * + * "Note that URB needs to be set as low b/w client in SLM mode, + * else the hash will fail. This is a required s/w model." + */ + l3cntlreg2 |= GEN7_REG_L3CNTLREG2_URBSLMB | + GEN7_REG_L3CNTLREG2_SLMMENB; + } + + gen6_MI_LOAD_REGISTER_IMM(r->builder, GEN7_REG_L3SQCREG1, l3sqcreg1); + gen6_MI_LOAD_REGISTER_IMM(r->builder, GEN7_REG_L3CNTLREG2, l3cntlreg2); + gen6_MI_LOAD_REGISTER_IMM(r->builder, GEN7_REG_L3CNTLREG3, l3cntlreg3); +} + +int +ilo_render_get_launch_grid_commands_len(const struct ilo_render *render, + const struct ilo_state_vector *vec) +{ + static int len; + + ILO_DEV_ASSERT(render->dev, 7, 7.5); + + if (!len) { + len += + GEN6_PIPELINE_SELECT__SIZE + + GEN6_STATE_BASE_ADDRESS__SIZE + + GEN6_MEDIA_VFE_STATE__SIZE + + GEN6_MEDIA_CURBE_LOAD__SIZE + + GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD__SIZE + + GEN6_MEDIA_STATE_FLUSH__SIZE; + + len += ilo_render_get_flush_len(render) * 3; + + if (ilo_dev_gen(render->dev) >= ILO_GEN(7)) { + len += GEN6_MI_LOAD_REGISTER_IMM__SIZE * 3 * 2; + len += GEN7_GPGPU_WALKER__SIZE; + } + } + + return len; +} + +void +ilo_render_emit_launch_grid_commands(struct ilo_render *render, + const struct ilo_state_vector *vec, + const struct ilo_render_launch_grid_session *session) +{ + const unsigned batch_used = ilo_builder_batch_used(render->builder); + const uint32_t pcb = render->state.cs.PUSH_CONSTANT_BUFFER; + const int pcb_size = render->state.cs.PUSH_CONSTANT_BUFFER_size; + int simd_size; + bool use_slm; + + ILO_DEV_ASSERT(render->dev, 7, 7.5); + + simd_size = ilo_shader_get_kernel_param(vec->cs, ILO_KERNEL_CS_SIMD_SIZE); + use_slm = ilo_shader_get_kernel_param(vec->cs, ILO_KERNEL_CS_LOCAL_SIZE); + + ilo_render_emit_flush(render); + + if (ilo_dev_gen(render->dev) >= ILO_GEN(7)) { + gen7_launch_grid_l3(render, use_slm); + ilo_render_emit_flush(render); + + gen6_PIPELINE_SELECT(render->builder, + GEN7_PIPELINE_SELECT_DW0_SELECT_GPGPU); + } else { + gen6_PIPELINE_SELECT(render->builder, + GEN6_PIPELINE_SELECT_DW0_SELECT_MEDIA); + } + + gen6_state_base_address(render->builder, true); + + gen6_MEDIA_VFE_STATE(render->builder, pcb_size, use_slm); + + if (pcb_size) + gen6_MEDIA_CURBE_LOAD(render->builder, pcb, pcb_size); + + gen6_MEDIA_INTERFACE_DESCRIPTOR_LOAD(render->builder, + session->idrt, session->idrt_size); + + gen7_GPGPU_WALKER(render->builder, session->thread_group_offset, + session->thread_group_dim, session->thread_group_size, simd_size); + + gen6_MEDIA_STATE_FLUSH(render->builder); + + if (ilo_dev_gen(render->dev) >= ILO_GEN(7) && use_slm) { + ilo_render_emit_flush(render); + gen7_launch_grid_l3(render, false); + } + + assert(ilo_builder_batch_used(render->builder) <= batch_used + + ilo_render_get_launch_grid_commands_len(render, vec)); +} diff --git a/src/gallium/drivers/ilo/ilo_render_surface.c b/src/gallium/drivers/ilo/ilo_render_surface.c index 22a7e488edf..657fbfdabec 100644 --- a/src/gallium/drivers/ilo/ilo_render_surface.c +++ b/src/gallium/drivers/ilo/ilo_render_surface.c @@ -381,3 +381,177 @@ ilo_render_emit_draw_surface_states(struct ilo_render *render, assert(ilo_builder_surface_used(render->builder) <= surface_used + ilo_render_get_draw_surface_states_len(render, vec)); } + +static void +gen6_emit_launch_grid_surface_view(struct ilo_render *r, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + const struct ilo_shader_state *cs = vec->cs; + const struct ilo_view_state *view = &vec->view[PIPE_SHADER_COMPUTE]; + uint32_t *surface_state = r->state.cs.SURFACE_STATE; + int base, count, i; + + ILO_DEV_ASSERT(r->dev, 7, 7.5); + + base = ilo_shader_get_kernel_param(cs, ILO_KERNEL_SURFACE_TEX_BASE); + count = ilo_shader_get_kernel_param(cs, ILO_KERNEL_SURFACE_TEX_COUNT); + + /* SURFACE_STATEs for sampler views */ + surface_state += base; + for (i = 0; i < count; i++) { + if (i < view->count && view->states[i]) { + const struct ilo_view_cso *cso = + (const struct ilo_view_cso *) view->states[i]; + + surface_state[i] = + gen6_SURFACE_STATE(r->builder, &cso->surface, false); + } else { + surface_state[i] = 0; + } + } +} + +static void +gen6_emit_launch_grid_surface_const(struct ilo_render *r, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + const struct ilo_shader_state *cs = vec->cs; + uint32_t *surface_state = r->state.cs.SURFACE_STATE; + struct ilo_view_surface view; + int base, count; + + ILO_DEV_ASSERT(r->dev, 7, 7.5); + + base = ilo_shader_get_kernel_param(cs, ILO_KERNEL_SURFACE_CONST_BASE); + count = ilo_shader_get_kernel_param(cs, ILO_KERNEL_SURFACE_CONST_COUNT); + + if (!count) + return; + + ilo_gpe_init_view_surface_for_buffer(r->dev, + ilo_buffer(session->input->buffer), + session->input->buffer_offset, + session->input->buffer_size, + 1, PIPE_FORMAT_NONE, + false, false, &view); + + assert(count == 1 && session->input->buffer); + surface_state[base] = gen6_SURFACE_STATE(r->builder, &view, false); +} + +static void +gen6_emit_launch_grid_surface_cs_resource(struct ilo_render *r, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + ILO_DEV_ASSERT(r->dev, 7, 7.5); + + /* TODO */ + assert(!vec->cs_resource.count); +} + +static void +gen6_emit_launch_grid_surface_global(struct ilo_render *r, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + const struct ilo_shader_state *cs = vec->cs; + const struct ilo_global_binding_cso *bindings = + util_dynarray_begin(&vec->global_binding.bindings); + uint32_t *surface_state = r->state.cs.SURFACE_STATE; + int base, count, i; + + ILO_DEV_ASSERT(r->dev, 7, 7.5); + + base = ilo_shader_get_kernel_param(cs, ILO_KERNEL_CS_SURFACE_GLOBAL_BASE); + count = ilo_shader_get_kernel_param(cs, ILO_KERNEL_CS_SURFACE_GLOBAL_COUNT); + + if (!count) + return; + + if (base + count > Elements(r->state.cs.SURFACE_STATE)) { + ilo_warn("too many global bindings\n"); + count = Elements(r->state.cs.SURFACE_STATE) - base; + } + + /* SURFACE_STATEs for global bindings */ + surface_state += base; + for (i = 0; i < count; i++) { + if (i < vec->global_binding.count && bindings[i].resource) { + const struct ilo_buffer *buf = ilo_buffer(bindings[i].resource); + struct ilo_view_surface view; + + assert(bindings[i].resource->target == PIPE_BUFFER); + + ilo_gpe_init_view_surface_for_buffer(r->dev, buf, 0, buf->bo_size, + 1, PIPE_FORMAT_NONE, true, true, &view); + surface_state[i] = + gen6_SURFACE_STATE(r->builder, &view, true); + } else { + surface_state[i] = 0; + } + } +} + +static void +gen6_emit_launch_grid_surface_binding_table(struct ilo_render *r, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + const struct ilo_shader_state *cs = vec->cs; + int count; + + ILO_DEV_ASSERT(r->dev, 7, 7.5); + + count = ilo_shader_get_kernel_param(cs, ILO_KERNEL_SURFACE_TOTAL_COUNT); + if (count) { + r->state.cs.BINDING_TABLE_STATE = gen6_BINDING_TABLE_STATE(r->builder, + r->state.cs.SURFACE_STATE, count); + } +} + +int +ilo_render_get_launch_grid_surface_states_len(const struct ilo_render *render, + const struct ilo_state_vector *vec) +{ + const int alignment = 32 / 4; + int num_surfaces; + int len = 0; + + ILO_DEV_ASSERT(render->dev, 7, 7.5); + + num_surfaces = ilo_shader_get_kernel_param(vec->cs, + ILO_KERNEL_SURFACE_TOTAL_COUNT); + + /* BINDING_TABLE_STATE and SURFACE_STATEs */ + if (num_surfaces) { + len += align(num_surfaces, alignment) + + align(GEN6_SURFACE_STATE__SIZE, alignment) * num_surfaces; + } + + return len; +} + +void +ilo_render_emit_launch_grid_surface_states(struct ilo_render *render, + const struct ilo_state_vector *vec, + struct ilo_render_launch_grid_session *session) +{ + const unsigned surface_used = ilo_builder_surface_used(render->builder); + + ILO_DEV_ASSERT(render->dev, 7, 7.5); + + /* idrt depends on the binding table */ + assert(!session->idrt_size); + + gen6_emit_launch_grid_surface_view(render, vec, session); + gen6_emit_launch_grid_surface_const(render, vec, session); + gen6_emit_launch_grid_surface_cs_resource(render, vec, session); + gen6_emit_launch_grid_surface_global(render, vec, session); + gen6_emit_launch_grid_surface_binding_table(render, vec, session); + + assert(ilo_builder_surface_used(render->builder) <= surface_used + + ilo_render_get_launch_grid_surface_states_len(render, vec)); +} |