diff options
| author | Jonathan Marek <[email protected]> | 2019-05-31 16:04:10 -0400 |
|---|---|---|
| committer | Jonathan Marek <[email protected]> | 2019-05-31 21:35:26 +0000 |
| commit | f6579ee2043094dc36a0627e4e66c82e78aaf73b (patch) | |
| tree | 29745fe294a298e6668975be4cd6a820cce364a4 | |
| parent | f889180ee101c2fecd573dd364d91883ccdd30df (diff) | |
nir: fix lower_{int,bool}_to_float for new mov opcode
It is treated like the vecN instructions which also have no type.
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
| -rw-r--r-- | src/compiler/nir/nir_lower_bool_to_float.c | 1 | ||||
| -rw-r--r-- | src/compiler/nir/nir_lower_int_to_float.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/compiler/nir/nir_lower_bool_to_float.c b/src/compiler/nir/nir_lower_bool_to_float.c index c48b800a365..c07121f6d88 100644 --- a/src/compiler/nir/nir_lower_bool_to_float.c +++ b/src/compiler/nir/nir_lower_bool_to_float.c @@ -52,6 +52,7 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu) /* Replacement SSA value */ nir_ssa_def *rep = NULL; switch (alu->op) { + case nir_op_mov: case nir_op_vec2: case nir_op_vec3: case nir_op_vec4: diff --git a/src/compiler/nir/nir_lower_int_to_float.c b/src/compiler/nir/nir_lower_int_to_float.c index d0da60c925b..e3503dcc8f8 100644 --- a/src/compiler/nir/nir_lower_int_to_float.c +++ b/src/compiler/nir/nir_lower_int_to_float.c @@ -54,6 +54,7 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu) /* Replacement SSA value */ nir_ssa_def *rep = NULL; switch (alu->op) { + case nir_op_mov: case nir_op_vec2: case nir_op_vec3: case nir_op_vec4: |