diff options
| author | Samuel Pitoiset <[email protected]> | 2019-07-11 08:44:13 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-07-11 15:45:43 +0200 |
| commit | ef5efb40f4621361fbceef4461b3c3d812e97ade (patch) | |
| tree | 9c6949f1505ce7272d152fd3a5d7cf111b094e39 | |
| parent | 8bc3ab6f0cbea10dff4e78bfa14772b389df0f93 (diff) | |
radv/gfx10: fix VGT_SHADER_STAGES_EN for GS as NGG
The driver shouldn't set the copy shader bit.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 2ea984c8328..bb434f81325 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -3865,22 +3865,23 @@ radv_compute_vgt_shader_stages_en(const struct radv_pipeline *pipeline) S_028B54_HS_EN(1) | S_028B54_DYNAMIC_HS(1); if (radv_pipeline_has_gs(pipeline)) - stages |= S_028B54_ES_EN(V_028B54_ES_STAGE_DS) | - S_028B54_GS_EN(1) | - S_028B54_VS_EN(V_028B54_VS_STAGE_COPY_SHADER); - else if (radv_pipeline_has_ngg(pipeline)) stages |= S_028B54_ES_EN(V_028B54_ES_STAGE_DS) | - S_028B54_PRIMGEN_EN(1); + S_028B54_GS_EN(1); + else if (radv_pipeline_has_ngg(pipeline)) + stages |= S_028B54_ES_EN(V_028B54_ES_STAGE_DS); else stages |= S_028B54_VS_EN(V_028B54_VS_STAGE_DS); - } else if (radv_pipeline_has_gs(pipeline)) { stages |= S_028B54_ES_EN(V_028B54_ES_STAGE_REAL) | - S_028B54_GS_EN(1) | - S_028B54_VS_EN(V_028B54_VS_STAGE_COPY_SHADER); + S_028B54_GS_EN(1); } else if (radv_pipeline_has_ngg(pipeline)) { - stages |= S_028B54_ES_EN(V_028B54_ES_STAGE_REAL) | - S_028B54_PRIMGEN_EN(1); + stages |= S_028B54_ES_EN(V_028B54_ES_STAGE_REAL); + } + + if (radv_pipeline_has_ngg(pipeline)) { + stages |= S_028B54_PRIMGEN_EN(1); + } else { + stages |= S_028B54_VS_EN(V_028B54_VS_STAGE_COPY_SHADER); } if (pipeline->device->physical_device->rad_info.chip_class >= GFX9) |