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authorSamuel Pitoiset <[email protected]>2019-07-09 08:43:59 +0200
committerSamuel Pitoiset <[email protected]>2019-07-09 09:54:22 +0200
commiteca8a478a5d041df45c16fd23ac226b984e6a04b (patch)
treeac89e8e61a9d22004ef946889faa1ffb3917dcdb
parentf240147cf71f0df4d0ea85c3797e6ac88e3dbc59 (diff)
radv: emit VGT_GS_MAX_VERT_OUT for legacy and NGG paths for GS
Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
-rw-r--r--src/amd/vulkan/radv_pipeline.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 26406930b86..e02d9451074 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3568,8 +3568,6 @@ radv_pipeline_generate_hw_gs(struct radeon_cmdbuf *ctx_cs,
offset += num_components[3] * gs_max_out_vertices;
radeon_set_context_reg(ctx_cs, R_028AB0_VGT_GSVS_RING_ITEMSIZE, offset);
- radeon_set_context_reg(ctx_cs, R_028B38_VGT_GS_MAX_VERT_OUT, gs->info.gs.vertices_out);
-
radeon_set_context_reg_seq(ctx_cs, R_028B5C_VGT_GS_VERT_ITEMSIZE, 4);
radeon_emit(ctx_cs, num_components[0]);
radeon_emit(ctx_cs, (max_stream >= 1) ? num_components[1] : 0);
@@ -3631,6 +3629,9 @@ radv_pipeline_generate_geometry_shader(struct radeon_cmdbuf *ctx_cs,
radv_pipeline_generate_hw_ngg(ctx_cs, cs, pipeline, gs, ngg_state);
else
radv_pipeline_generate_hw_gs(ctx_cs, cs, pipeline, gs, gs_state);
+
+ radeon_set_context_reg(ctx_cs, R_028B38_VGT_GS_MAX_VERT_OUT,
+ gs->info.gs.vertices_out);
}
static uint32_t offset_to_ps_input(uint32_t offset, bool flat_shade, bool float16)