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authorSamuel Pitoiset <[email protected]>2019-04-15 18:41:15 +0200
committerSamuel Pitoiset <[email protected]>2019-04-15 21:36:53 +0200
commitbf4a0485d9afd12098cc7e21aa12988f2fcb9480 (patch)
tree0abddf9873f9801794b9e650010bfe8c864cf64c
parentf6fdd39eabc61b973fcc84fce2ccc86493085917 (diff)
radv: set ACCESS_NON_READABLE on stores for copy/fill/clear meta shaders
The compiler will emit GLC=1. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
-rw-r--r--src/amd/vulkan/radv_meta_buffer.c2
-rw-r--r--src/amd/vulkan/radv_meta_clear.c1
2 files changed, 3 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_meta_buffer.c b/src/amd/vulkan/radv_meta_buffer.c
index b3aed109a5e..3e4f63ad3c1 100644
--- a/src/amd/vulkan/radv_meta_buffer.c
+++ b/src/amd/vulkan/radv_meta_buffer.c
@@ -51,6 +51,7 @@ build_buffer_fill_shader(struct radv_device *dev)
store->src[1] = nir_src_for_ssa(&dst_buf->dest.ssa);
store->src[2] = nir_src_for_ssa(offset);
nir_intrinsic_set_write_mask(store, 0xf);
+ nir_intrinsic_set_access(store, ACCESS_NON_READABLE);
store->num_components = 4;
nir_builder_instr_insert(&b, &store->instr);
@@ -110,6 +111,7 @@ build_buffer_copy_shader(struct radv_device *dev)
store->src[1] = nir_src_for_ssa(&dst_buf->dest.ssa);
store->src[2] = nir_src_for_ssa(offset);
nir_intrinsic_set_write_mask(store, 0xf);
+ nir_intrinsic_set_access(store, ACCESS_NON_READABLE);
store->num_components = 4;
nir_builder_instr_insert(&b, &store->instr);
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 4407bd75ee9..101ef4344f4 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1114,6 +1114,7 @@ build_clear_htile_mask_shader()
store->src[1] = nir_src_for_ssa(&buf->dest.ssa);
store->src[2] = nir_src_for_ssa(offset);
nir_intrinsic_set_write_mask(store, 0xf);
+ nir_intrinsic_set_access(store, ACCESS_NON_READABLE);
store->num_components = 4;
nir_builder_instr_insert(&b, &store->instr);