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authorJan Vesely <[email protected]>2016-09-12 20:47:37 -0400
committerJan Vesely <[email protected]>2016-09-13 14:23:26 -0400
commitb671909d2799b86fd30ae89a5ad1fe4973250680 (patch)
tree3d0d925bbc797a335e7a34f2f35360858ba87766
parent304f70536a73f4b63360632428241c7488c99610 (diff)
radeon: Don't check DCC on pipe buffers
Fixes segfaults in EG compute since: commit 21de3be8e62b2b093569a99550e6356ed2f106b4 radeonsi: fix texture format reinterpretation with DCC Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 41fd94b2437..d3a498fb35d 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1788,9 +1788,10 @@ struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe,
surface->base.u = templ->u;
surface->level_info = &rtex->surface.level[templ->u.tex.level];
- vi_dcc_disable_if_incompatible_format(rctx, texture,
- templ->u.tex.level,
- templ->format);
+ if (texture->target != PIPE_BUFFER)
+ vi_dcc_disable_if_incompatible_format(rctx, texture,
+ templ->u.tex.level,
+ templ->format);
return &surface->base;
}