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authorJason Ekstrand <[email protected]>2017-10-28 09:02:14 -0700
committerJason Ekstrand <[email protected]>2017-11-08 20:10:04 -0800
commit951a5dc4cc29da996b54ae63eeba1915a3a65b4a (patch)
tree05839767ebe7bf4a38bf5ce980b0996be8c0211f
parentf317f72f7310cbe741d82970fd335cb8c83300eb (diff)
intel/nir: Use the correct indirect lowering masks in link_shaders
Previously, if we were linking a vec4 VS with a SIMD8/16 FS, we wouldn't lower indirects on the fragment shader which is wrong. Instead of using a single indirect mask, take advantage of our new little helper. Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com> Cc: [email protected]
-rw-r--r--src/intel/compiler/brw_nir.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 3f11fb77554..8f3f77f89ae 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -686,16 +686,14 @@ brw_nir_link_shaders(const struct brw_compiler *compiler,
NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
- nir_variable_mode indirect_mask = (nir_variable_mode) 0;
- if (compiler->glsl_compiler_options[(*producer)->info.stage].EmitNoIndirectTemp)
- indirect_mask = nir_var_local;
-
/* The backend might not be able to handle indirects on
* temporaries so we need to lower indirects on any of the
* varyings we have demoted here.
*/
- NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
- NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
+ NIR_PASS_V(*producer, nir_lower_indirect_derefs,
+ brw_nir_no_indirect_mask(compiler, (*producer)->info.stage));
+ NIR_PASS_V(*consumer, nir_lower_indirect_derefs,
+ brw_nir_no_indirect_mask(compiler, (*consumer)->info.stage));
const bool p_is_scalar =
compiler->scalar_stage[(*producer)->info.stage];