summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRafael Antognolli <[email protected]>2018-01-17 16:19:41 -0800
committerRafael Antognolli <[email protected]>2018-04-05 07:42:45 -0700
commit8e1f2e1d2dee09cf61c13c0aadf99712f59fafb9 (patch)
tree6bcfad9d304127923394990f400ef19e9e70d926
parentf421a3163751f482818958d8745701ec3174ff83 (diff)
genxml: Preserve fields that share dword space with addresses.
Some instructions contain fields that are either an address or a value of some type based on the content of other fields, such as clear color values vs address. That works fine if these fields are in the less significant dword, the lower 32 bits of the address, because they get OR'ed with the address. But if they are in the higher 32 bits, they get discarded. On Gen10 we have fields that share space with the higher 16 bits of the address too. This commit makes sure those fields don't get discarded. v5: Remove spurious whitespace (Jason). Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
-rw-r--r--src/intel/genxml/gen_pack_header.py8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/intel/genxml/gen_pack_header.py b/src/intel/genxml/gen_pack_header.py
index 7dcada86fae..8989f625d31 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
@@ -494,8 +494,12 @@ class Group(object):
v_address = "v%d_address" % index
print(" const uint64_t %s =\n __gen_combine_address(data, &dw[%d], values->%s, %s);" %
(v_address, index, dw.address.name + field.dim, v))
- v = v_address
-
+ if len(dw.fields) > address_count:
+ print(" dw[%d] = %s;" % (index, v_address))
+ print(" dw[%d] = (%s >> 32) | (%s >> 32);" % (index + 1, v_address, v))
+ continue
+ else:
+ v = v_address
print(" dw[%d] = %s;" % (index, v))
print(" dw[%d] = %s >> 32;" % (index + 1, v))