diff options
| author | Pohjolainen, Topi <[email protected]> | 2017-06-21 22:35:46 +0300 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2017-06-21 16:25:24 -0700 |
| commit | 6a86795a3d1cc50b38c8c10c951037d39bd42e79 (patch) | |
| tree | 287b22931cabe175ba339abe6b1a0ea6a5358d5c | |
| parent | c06b1d3c16e54bd6d65ead68e94939d9b4fdcddd (diff) | |
i965/gen6: Use isl-based miptree also for stencil rbs
Fixes dEQP-EGL.functional.image.render_multiple_contexts.
gles2_renderbuffer_stencil_stencil_buffer
Signed-off-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 3b7262f086b..fe00d4b55ff 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -897,7 +897,22 @@ intel_miptree_create_for_bo(struct brw_context *brw, { struct intel_mipmap_tree *mt; uint32_t tiling, swizzle; - GLenum target; + const GLenum target = depth > 1 ? GL_TEXTURE_2D_ARRAY : GL_TEXTURE_2D; + + if (brw->gen == 6 && format == MESA_FORMAT_S_UINT8) { + mt = make_surface(brw, target, MESA_FORMAT_S_UINT8, + 0, 0, width, height, depth, 1, ISL_TILING_W, + ISL_SURF_USAGE_STENCIL_BIT | + ISL_SURF_USAGE_TEXTURE_BIT, + BO_ALLOC_FOR_RENDER, bo); + if (!mt) + return NULL; + + assert(bo->size >= mt->surf.size); + + brw_bo_reference(bo); + return mt; + } brw_bo_get_tiling(bo, &tiling, &swizzle); @@ -912,8 +927,6 @@ intel_miptree_create_for_bo(struct brw_context *brw, */ assert(pitch >= 0); - target = depth > 1 ? GL_TEXTURE_2D_ARRAY : GL_TEXTURE_2D; - /* The BO already has a tiling format and we shouldn't confuse the lower * layers by making it try to find a tiling format again. */ |