diff options
author | Samuel Pitoiset <[email protected]> | 2017-12-06 12:06:43 +0100 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2017-12-08 11:22:35 +0100 |
commit | 33b329f7699c4f92fbceedea9032ea275f522a50 (patch) | |
tree | d356af4b85592e4f67d5c573cb6bd8092ff0b5f8 | |
parent | c202119286080bdd6c83893128c7d92bd8a0dfa8 (diff) |
radv/winsys: implement query_value()
Might be useful to know the VRAM/GTT usage, the number of VRAM
CPU page faults, etc. Nothing is currently using that new
interface, but it's a first step.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
-rw-r--r-- | src/amd/vulkan/radv_radeon_winsys.h | 16 | ||||
-rw-r--r-- | src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c | 56 |
2 files changed, 72 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h index 66a2bcccb4d..2b815d9c5a9 100644 --- a/src/amd/vulkan/radv_radeon_winsys.h +++ b/src/amd/vulkan/radv_radeon_winsys.h @@ -80,6 +80,19 @@ enum radeon_ctx_priority { RADEON_CTX_PRIORITY_REALTIME, }; +enum radeon_value_id { + RADEON_TIMESTAMP, + RADEON_NUM_BYTES_MOVED, + RADEON_NUM_EVICTIONS, + RADEON_NUM_VRAM_CPU_PAGE_FAULTS, + RADEON_VRAM_USAGE, + RADEON_VRAM_VIS_USAGE, + RADEON_GTT_USAGE, + RADEON_GPU_TEMPERATURE, + RADEON_CURRENT_SCLK, + RADEON_CURRENT_MCLK, +}; + struct radeon_winsys_cs { unsigned cdw; /* Number of used dwords. */ unsigned max_dw; /* Maximum number of dwords. */ @@ -169,6 +182,9 @@ struct radeon_winsys { void (*query_info)(struct radeon_winsys *ws, struct radeon_info *info); + uint64_t (*query_value)(struct radeon_winsys *ws, + enum radeon_value_id value); + bool (*read_registers)(struct radeon_winsys *ws, unsigned reg_offset, unsigned num_registers, uint32_t *out); diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c index fec1c5ad655..0c6374e71c9 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c @@ -71,6 +71,61 @@ static void radv_amdgpu_winsys_query_info(struct radeon_winsys *rws, *info = ((struct radv_amdgpu_winsys *)rws)->info; } +static uint64_t radv_amdgpu_winsys_query_value(struct radeon_winsys *rws, + enum radeon_value_id value) +{ + struct radv_amdgpu_winsys *ws = (struct radv_amdgpu_winsys *)rws; + struct amdgpu_heap_info heap; + uint64_t retval = 0; + + switch (value) { + case RADEON_TIMESTAMP: + amdgpu_query_info(ws->dev, AMDGPU_INFO_TIMESTAMP, 8, &retval); + return retval; + case RADEON_NUM_BYTES_MOVED: + amdgpu_query_info(ws->dev, AMDGPU_INFO_NUM_BYTES_MOVED, + 8, &retval); + return retval; + case RADEON_NUM_EVICTIONS: + amdgpu_query_info(ws->dev, AMDGPU_INFO_NUM_EVICTIONS, + 8, &retval); + return retval; + case RADEON_NUM_VRAM_CPU_PAGE_FAULTS: + amdgpu_query_info(ws->dev, AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS, + 8, &retval); + return retval; + case RADEON_VRAM_USAGE: + amdgpu_query_heap_info(ws->dev, AMDGPU_GEM_DOMAIN_VRAM, + 0, &heap); + return heap.heap_usage; + case RADEON_VRAM_VIS_USAGE: + amdgpu_query_heap_info(ws->dev, AMDGPU_GEM_DOMAIN_VRAM, + AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, + &heap); + return heap.heap_usage; + case RADEON_GTT_USAGE: + amdgpu_query_heap_info(ws->dev, AMDGPU_GEM_DOMAIN_GTT, + 0, &heap); + return heap.heap_usage; + case RADEON_GPU_TEMPERATURE: + amdgpu_query_sensor_info(ws->dev, AMDGPU_INFO_SENSOR_GPU_TEMP, + 4, &retval); + return retval; + case RADEON_CURRENT_SCLK: + amdgpu_query_sensor_info(ws->dev, AMDGPU_INFO_SENSOR_GFX_SCLK, + 4, &retval); + return retval; + case RADEON_CURRENT_MCLK: + amdgpu_query_sensor_info(ws->dev, AMDGPU_INFO_SENSOR_GFX_MCLK, + 4, &retval); + return retval; + default: + unreachable("invalid query value"); + } + + return 0; +} + static bool radv_amdgpu_winsys_read_registers(struct radeon_winsys *rws, unsigned reg_offset, unsigned num_registers, uint32_t *out) @@ -127,6 +182,7 @@ radv_amdgpu_winsys_create(int fd, uint64_t debug_flags, uint64_t perftest_flags) LIST_INITHEAD(&ws->global_bo_list); pthread_mutex_init(&ws->global_bo_list_lock, NULL); ws->base.query_info = radv_amdgpu_winsys_query_info; + ws->base.query_value = radv_amdgpu_winsys_query_value; ws->base.read_registers = radv_amdgpu_winsys_read_registers; ws->base.get_chip_name = radv_amdgpu_winsys_get_chip_name; ws->base.destroy = radv_amdgpu_winsys_destroy; |