diff options
| author | Nanley Chery <[email protected]> | 2016-05-18 10:43:42 -0700 |
|---|---|---|
| committer | Nanley Chery <[email protected]> | 2016-05-20 09:27:11 -0700 |
| commit | de86fb875d6627547b9823e830ec751b0f7ce42a (patch) | |
| tree | 58269031b39c34379bb7013582d3af073f780da6 | |
| parent | 4e2c9a04354b6b133845b8b93c0c5d34261a91d0 (diff) | |
isl: Add 2D ASTC format layouts and enums
Also, make changes needed for successful compilation and registration
as a texture compression mode.
Signed-off-by: Nanley Chery <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
| -rw-r--r-- | src/intel/isl/isl.h | 30 | ||||
| -rw-r--r-- | src/intel/isl/isl_format_layout.csv | 28 | ||||
| -rwxr-xr-x | src/intel/isl/isl_format_layout_gen.bash | 2 |
3 files changed, 59 insertions, 1 deletions
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 2a29b28da59..71f297174f5 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -307,6 +307,34 @@ enum isl_format { ISL_FORMAT_R8G8B8_UINT = 456, ISL_FORMAT_R8G8B8_SINT = 457, ISL_FORMAT_RAW = 511, + ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB = 512, + ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB = 520, + ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB = 521, + ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB = 529, + ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB = 530, + ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB = 545, + ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB = 546, + ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB = 548, + ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB = 561, + ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB = 562, + ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB = 564, + ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB = 566, + ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB = 574, + ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB = 575, + ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16 = 576, + ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16 = 584, + ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16 = 585, + ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16 = 593, + ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16 = 594, + ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16 = 609, + ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16 = 610, + ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16 = 612, + ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16 = 625, + ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16 = 626, + ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16 = 628, + ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16 = 630, + ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16 = 638, + ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16 = 639, /* Hardware doesn't understand this out-of-band value */ ISL_FORMAT_UNSUPPORTED = UINT16_MAX, @@ -354,6 +382,7 @@ enum isl_txc { ISL_TXC_BPTC, ISL_TXC_ETC1, ISL_TXC_ETC2, + ISL_TXC_ASTC, }; /** @@ -879,6 +908,7 @@ isl_format_has_bc_compression(enum isl_format fmt) case ISL_TXC_BPTC: case ISL_TXC_ETC1: case ISL_TXC_ETC2: + case ISL_TXC_ASTC: return false; } diff --git a/src/intel/isl/isl_format_layout.csv b/src/intel/isl/isl_format_layout.csv index af2786ae630..d66a172891c 100644 --- a/src/intel/isl/isl_format_layout.csv +++ b/src/intel/isl/isl_format_layout.csv @@ -285,3 +285,31 @@ ETC2_EAC_SRGB8_A8 , 128, 4, 4, 1, un8, un8, un8, un8, , R8G8B8_UINT , 24, 1, 1, 1, ui8, ui8, ui8, , , , , linear, R8G8B8_SINT , 24, 1, 1, 1, si8, si8, si8, , , , , linear, RAW , 0, 0, 0, 0, , , , , , , , , +ASTC_LDR_2D_4X4_U8SRGB , 128, 4, 4, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_5X4_U8SRGB , 128, 5, 4, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_5X5_U8SRGB , 128, 5, 5, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_6X5_U8SRGB , 128, 6, 5, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_6X6_U8SRGB , 128, 6, 6, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_8X5_U8SRGB , 128, 8, 5, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_8X6_U8SRGB , 128, 8, 6, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_8X8_U8SRGB , 128, 8, 8, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_10X5_U8SRGB , 128, 10, 5, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_10X6_U8SRGB , 128, 10, 6, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_10X8_U8SRGB , 128, 10, 8, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_10X10_U8SRGB , 128, 10, 10, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_12X10_U8SRGB , 128, 12, 10, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_12X12_U8SRGB , 128, 12, 12, 1, un8, un8, un8, un8, , , , srgb, astc +ASTC_LDR_2D_4X4_FLT16 , 128, 4, 4, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_5X4_FLT16 , 128, 5, 4, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_5X5_FLT16 , 128, 5, 5, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_6X5_FLT16 , 128, 6, 5, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_6X6_FLT16 , 128, 6, 6, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_8X5_FLT16 , 128, 8, 5, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_8X6_FLT16 , 128, 8, 6, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_8X8_FLT16 , 128, 8, 8, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_10X5_FLT16 , 128, 10, 5, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_10X6_FLT16 , 128, 10, 6, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_10X8_FLT16 , 128, 10, 8, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_10X10_FLT16 , 128, 10, 10, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_12X10_FLT16 , 128, 12, 10, 1, sf16, sf16, sf16, sf16, , , , linear, astc +ASTC_LDR_2D_12X12_FLT16 , 128, 12, 12, 1, sf16, sf16, sf16, sf16, , , , linear, astc diff --git a/src/intel/isl/isl_format_layout_gen.bash b/src/intel/isl/isl_format_layout_gen.bash index db883827376..31830815453 100755 --- a/src/intel/isl/isl_format_layout_gen.bash +++ b/src/intel/isl/isl_format_layout_gen.bash @@ -85,7 +85,7 @@ s/\<(linear|srgb|yuv)\>/ISL_COLORSPACE_\1/ s/\<alpha\>// # Translate texture compression -s/\<(dxt|fxt|rgtc|bptc|etc)([0-9]*)\>/ISL_TXC_\1\2/ +s/\<(dxt|fxt|rgtc|bptc|etc|astc)([0-9]*)\>/ISL_TXC_\1\2/ ' | tr 'a-z' 'A-Z' | # Convert to uppersace while IFS=, read -r format bpb bw bh bd \ |