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authorKeith Whitwell <[email protected]>2010-10-14 16:42:39 +0100
committerDave Airlie <[email protected]>2010-10-15 08:33:25 +1000
commitc28f7645722ed3da1a04d3187f9cfa5d8e5e489d (patch)
tree52027c31c7a6821a27dd4b40fb121df307458736
parentcbf2fb55432b8239ea9792338ee1d2fea89648ea (diff)
r600g: emit hardware linewidth
Tested with demos/pixeltest - line rasterization doesn't seem to be set up for GL conventions yet, but at least width is respected now. Signed-off-by: Dave Airlie <[email protected]>
-rw-r--r--src/gallium/drivers/r600/r600_state.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 7b0aaef770f..2c0a2005cf7 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -499,7 +499,10 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
tmp = (unsigned)(state->point_size * 8.0);
r600_pipe_state_add_reg(rstate, R_028A00_PA_SU_POINT_SIZE, S_028A00_HEIGHT(tmp) | S_028A00_WIDTH(tmp), 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028A04_PA_SU_POINT_MINMAX, 0x80000000, 0xFFFFFFFF, NULL);
- r600_pipe_state_add_reg(rstate, R_028A08_PA_SU_LINE_CNTL, 0x00000008, 0xFFFFFFFF, NULL);
+
+ tmp = (unsigned)(state->line_width * 8.0);
+ r600_pipe_state_add_reg(rstate, R_028A08_PA_SU_LINE_CNTL, S_028A08_WIDTH(tmp), 0xFFFFFFFF, NULL);
+
r600_pipe_state_add_reg(rstate, R_028A0C_PA_SC_LINE_STIPPLE, 0x00000005, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028A48_PA_SC_MPASS_PS_CNTL, 0x00000000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028C00_PA_SC_LINE_CNTL, 0x00000400, 0xFFFFFFFF, NULL);