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authorRob Clark <[email protected]>2016-12-12 16:06:55 -0500
committerRob Clark <[email protected]>2016-12-18 13:48:10 -0500
commit939486d3d30caf434b93e1d2ccd10f5b2a06ed4d (patch)
tree5e0553970af9eba774f4c7e40a2906b14796d51b
parentbea8602e5b576eb98d8e4657f2b1287fb9f148a1 (diff)
freedreno/a5xx: use MRT0 to import linear zs
A bit of a hack, but we need to do this until we can do tiled zs in sysmem (and associated tile/until blits for transfer_map). Fixes xonotic and glmark2 "refract", when reorder wasn't enabled. (reorder would paper over the issue by avoiding the extra round- trip to system memory and back to gmem. Signed-off-by: Rob Clark <[email protected]>
-rw-r--r--src/gallium/drivers/freedreno/a5xx/fd5_gmem.c25
1 files changed, 20 insertions, 5 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
index 21104c2f1dc..19204584619 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
@@ -328,7 +328,7 @@ fd5_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile)
*/
emit_mrt(ring, pfb->nr_cbufs, pfb->cbufs, NULL);
- emit_zs(ring, pfb->zsbuf, NULL);
+// emit_zs(ring, pfb->zsbuf, NULL);
OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1);
OUT_RING(ring, A5XX_RB_CNTL_WIDTH(gmem->bin_w) |
@@ -351,10 +351,25 @@ fd5_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile)
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
// XXX BLIT_ZS vs BLIT_Z32 .. need some more cmdstream traces
// with z32_x24s8..
- if (!rsc->stencil || (batch->restore & FD_BUFFER_DEPTH))
- emit_mem2gmem_surf(batch, ctx->gmem.zsbuf_base[0], pfb->zsbuf, BLIT_ZS);
- if (rsc->stencil && (batch->restore & FD_BUFFER_STENCIL))
- emit_mem2gmem_surf(batch, ctx->gmem.zsbuf_base[1], pfb->zsbuf, BLIT_ZS);
+
+ // XXX hack import via BLIT_MRT0 instead of BLIT_ZS, since I don't
+ // know otherwise how to go from linear in sysmem to tiled in gmem.
+ // possibly we want to flip this around gmem2mem and keep depth
+ // tiled in sysmem (and fixup sampler state to assume tiled).. this
+ // might be required for doing depth/stencil in bypass mode?
+ struct fd_resource_slice *slice = fd_resource_slice(rsc, 0);
+ enum a5xx_color_fmt format =
+ fd5_pipe2color(fd_gmem_restore_format(pfb->zsbuf->format));
+
+ OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(0), 5);
+ OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
+ A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(TILE5_LINEAR) |
+ A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(WZYX));
+ OUT_RING(ring, A5XX_RB_MRT_PITCH(slice->pitch * rsc->cpp));
+ OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(slice->size0));
+ OUT_RELOCW(ring, rsc->bo, 0, 0, 0); /* BASE_LO/HI */
+
+ emit_mem2gmem_surf(batch, ctx->gmem.zsbuf_base[0], pfb->zsbuf, BLIT_MRT0);
}
}