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authorLionel Landwerlin <[email protected]>2016-08-11 18:25:09 +0100
committerAnuj Phogat <[email protected]>2016-08-12 17:03:48 -0700
commit0294dd00ccdab2c20d5df786ba780d7e091c2ab4 (patch)
tree971cc863e8e4edc846e1589d227deb786e57a7be
parent8c56ff643b1d6d18d81d82a4d23103a1cd51500a (diff)
anv: pipeline: gen7: fix assert in debug mode
SampleMask is only 8bits long on gen7. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97278 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
-rw-r--r--src/intel/vulkan/genX_pipeline_util.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/intel/vulkan/genX_pipeline_util.h b/src/intel/vulkan/genX_pipeline_util.h
index cf2adb0cfa4..679fb576835 100644
--- a/src/intel/vulkan/genX_pipeline_util.h
+++ b/src/intel/vulkan/genX_pipeline_util.h
@@ -463,7 +463,11 @@ emit_ms_state(struct anv_pipeline *pipeline,
*
* 3DSTATE_SAMPLE_MASK.SampleMask is 16 bits.
*/
+#if GEN_GEN >= 8
uint32_t sample_mask = 0xffff;
+#else
+ uint32_t sample_mask = 0xff;
+#endif
if (info) {
samples = info->rasterizationSamples;