diff options
| author | Kenneth Graunke <[email protected]> | 2012-02-18 13:08:29 -0800 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2012-02-18 20:12:46 -0800 |
| commit | df5963c25641a7c3a4bbfcb81cc3dc771581590e (patch) | |
| tree | e8065e5be261ea64aaee4521528ca5e331b22742 | |
| parent | 393b42240f22dbbfb4f089036319031ad36173f3 (diff) | |
i965: Make the dummy fragment shader work in SIMD16 mode.
If you're resorting to the dummy shader, you've probably already turned
off SIMD16 mode. But if you didn't, it would die in a fire.
We could either fail to compile in SIMD16 mode...or just fix it.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index f9b306457d1..15eae43f487 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -1800,16 +1800,18 @@ fs_visitor::emit(fs_inst inst) void fs_visitor::emit_dummy_fs() { + int reg_width = c->dispatch_width / 8; + /* Everyone's favorite color. */ - emit(BRW_OPCODE_MOV, fs_reg(MRF, 2), fs_reg(1.0f)); - emit(BRW_OPCODE_MOV, fs_reg(MRF, 3), fs_reg(0.0f)); - emit(BRW_OPCODE_MOV, fs_reg(MRF, 4), fs_reg(1.0f)); - emit(BRW_OPCODE_MOV, fs_reg(MRF, 5), fs_reg(0.0f)); + emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 0 * reg_width), fs_reg(1.0f)); + emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 1 * reg_width), fs_reg(0.0f)); + emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 2 * reg_width), fs_reg(1.0f)); + emit(BRW_OPCODE_MOV, fs_reg(MRF, 2 + 3 * reg_width), fs_reg(0.0f)); fs_inst *write; write = emit(FS_OPCODE_FB_WRITE, fs_reg(0), fs_reg(0)); write->base_mrf = 2; - write->mlen = 4; + write->mlen = 4 * reg_width; write->eot = true; } |