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authorJason Ekstrand <[email protected]>2015-11-30 18:05:00 -0800
committerJason Ekstrand <[email protected]>2015-12-03 13:43:52 -0800
commit7f2284063df569df40f68074833f1518005d348d (patch)
tree6a5f6434d4d04f2307bebeac8e2f44daebf25750
parent1ab9f843bc40c54daeb94676131e8323d4f2359f (diff)
vk/0.210.0: s/raster/rasterization/
-rw-r--r--include/vulkan/vulkan.h10
-rw-r--r--src/vulkan/anv_meta.c6
-rw-r--r--src/vulkan/anv_meta_clear.c6
-rw-r--r--src/vulkan/anv_pipeline.c21
-rw-r--r--src/vulkan/gen7_pipeline.c9
-rw-r--r--src/vulkan/gen8_pipeline.c6
6 files changed, 30 insertions, 28 deletions
diff --git a/include/vulkan/vulkan.h b/include/vulkan/vulkan.h
index 2c0c5a53c49..93c9bb488e7 100644
--- a/include/vulkan/vulkan.h
+++ b/include/vulkan/vulkan.h
@@ -151,7 +151,7 @@ typedef enum {
VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO = 17,
VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO = 18,
VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO = 19,
- VK_STRUCTURE_TYPE_PIPELINE_RASTER_STATE_CREATE_INFO = 20,
+ VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO = 20,
VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO = 21,
VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO = 22,
VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO = 23,
@@ -1696,7 +1696,7 @@ typedef struct VkPipelineViewportStateCreateInfo {
const VkRect2D* pScissors;
} VkPipelineViewportStateCreateInfo;
-typedef struct {
+typedef struct VkPipelineRasterizationStateCreateInfo {
VkStructureType sType;
const void* pNext;
VkPipelineRasterizationStateCreateFlags flags;
@@ -1710,13 +1710,13 @@ typedef struct {
float depthBiasClamp;
float depthBiasSlopeFactor;
float lineWidth;
-} VkPipelineRasterStateCreateInfo;
+} VkPipelineRasterizationStateCreateInfo;
typedef struct VkPipelineMultisampleStateCreateInfo {
VkStructureType sType;
const void* pNext;
VkPipelineMultisampleStateCreateFlags flags;
- uint32_t rasterSamples;
+ VkSampleCountFlagBits rasterizationSamples;
VkBool32 sampleShadingEnable;
float minSampleShading;
const VkSampleMask* pSampleMask;
@@ -1789,7 +1789,7 @@ typedef struct VkGraphicsPipelineCreateInfo {
const VkPipelineInputAssemblyStateCreateInfo* pInputAssemblyState;
const VkPipelineTessellationStateCreateInfo* pTessellationState;
const VkPipelineViewportStateCreateInfo* pViewportState;
- const VkPipelineRasterStateCreateInfo* pRasterState;
+ const VkPipelineRasterizationStateCreateInfo* pRasterizationState;
const VkPipelineMultisampleStateCreateInfo* pMultisampleState;
const VkPipelineDepthStencilStateCreateInfo* pDepthStencilState;
const VkPipelineColorBlendStateCreateInfo* pColorBlendState;
diff --git a/src/vulkan/anv_meta.c b/src/vulkan/anv_meta.c
index 877143cd7a0..f9b40004b23 100644
--- a/src/vulkan/anv_meta.c
+++ b/src/vulkan/anv_meta.c
@@ -353,8 +353,8 @@ anv_device_init_meta_blit_state(struct anv_device *device)
.viewportCount = 1,
.scissorCount = 1,
},
- .pRasterState = &(VkPipelineRasterStateCreateInfo) {
- .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTER_STATE_CREATE_INFO,
+ .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
.depthClipEnable = true,
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
@@ -363,7 +363,7 @@ anv_device_init_meta_blit_state(struct anv_device *device)
},
.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
- .rasterSamples = 1,
+ .rasterizationSamples = 1,
.sampleShadingEnable = false,
.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
},
diff --git a/src/vulkan/anv_meta_clear.c b/src/vulkan/anv_meta_clear.c
index 99004fd64ca..010323180e8 100644
--- a/src/vulkan/anv_meta_clear.c
+++ b/src/vulkan/anv_meta_clear.c
@@ -173,8 +173,8 @@ create_pipeline(struct anv_device *device,
.scissorCount = 1,
.pScissors = NULL, /* dynamic */
},
- .pRasterState = &(VkPipelineRasterStateCreateInfo) {
- .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTER_STATE_CREATE_INFO,
+ .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
+ .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
.depthClipEnable = false,
.rasterizerDiscardEnable = false,
.polygonMode = VK_POLYGON_MODE_FILL,
@@ -185,7 +185,7 @@ create_pipeline(struct anv_device *device,
},
.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
- .rasterSamples = 1, /* FINISHME: Multisampling */
+ .rasterizationSamples = 1, /* FINISHME: Multisampling */
.sampleShadingEnable = false,
.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
.alphaToCoverageEnable = false,
diff --git a/src/vulkan/anv_pipeline.c b/src/vulkan/anv_pipeline.c
index 47c62754a8a..25188a86486 100644
--- a/src/vulkan/anv_pipeline.c
+++ b/src/vulkan/anv_pipeline.c
@@ -314,13 +314,13 @@ populate_wm_prog_key(const struct brw_device_info *devinfo,
info->pMultisampleState &&
info->pMultisampleState->alphaToCoverageEnable;
- if (info->pMultisampleState && info->pMultisampleState->rasterSamples > 1) {
+ if (info->pMultisampleState && info->pMultisampleState->rasterizationSamples > 1) {
/* We should probably pull this out of the shader, but it's fairly
* harmless to compute it and then let dead-code take care of it.
*/
key->persample_shading = info->pMultisampleState->sampleShadingEnable;
if (key->persample_shading)
- key->persample_2x = info->pMultisampleState->rasterSamples == 2;
+ key->persample_2x = info->pMultisampleState->rasterizationSamples == 2;
key->compute_pos_offset = info->pMultisampleState->sampleShadingEnable;
key->compute_sample_id = info->pMultisampleState->sampleShadingEnable;
@@ -844,17 +844,18 @@ anv_pipeline_init_dynamic_state(struct anv_pipeline *pipeline,
}
if (states & (1 << VK_DYNAMIC_STATE_LINE_WIDTH)) {
- assert(pCreateInfo->pRasterState);
- dynamic->line_width = pCreateInfo->pRasterState->lineWidth;
+ assert(pCreateInfo->pRasterizationState);
+ dynamic->line_width = pCreateInfo->pRasterizationState->lineWidth;
}
if (states & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS)) {
- assert(pCreateInfo->pRasterState);
+ assert(pCreateInfo->pRasterizationState);
dynamic->depth_bias.bias =
- pCreateInfo->pRasterState->depthBiasConstantFactor;
- dynamic->depth_bias.clamp = pCreateInfo->pRasterState->depthBiasClamp;
+ pCreateInfo->pRasterizationState->depthBiasConstantFactor;
+ dynamic->depth_bias.clamp =
+ pCreateInfo->pRasterizationState->depthBiasClamp;
dynamic->depth_bias.slope =
- pCreateInfo->pRasterState->depthBiasSlopeFactor;
+ pCreateInfo->pRasterizationState->depthBiasSlopeFactor;
}
if (states & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS)) {
@@ -935,7 +936,7 @@ anv_pipeline_validate_create_info(const VkGraphicsPipelineCreateInfo *info)
assert(info->pVertexInputState);
assert(info->pInputAssemblyState);
assert(info->pViewportState);
- assert(info->pRasterState);
+ assert(info->pRasterizationState);
assert(info->pMultisampleState);
if (subpass && subpass->depth_stencil_attachment != VK_ATTACHMENT_UNUSED)
@@ -987,7 +988,7 @@ anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
if (pCreateInfo->pTessellationState)
anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO");
if (pCreateInfo->pMultisampleState &&
- pCreateInfo->pMultisampleState->rasterSamples > 1)
+ pCreateInfo->pMultisampleState->rasterizationSamples > 1)
anv_finishme("VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO");
pipeline->use_repclear = extra && extra->use_repclear;
diff --git a/src/vulkan/gen7_pipeline.c b/src/vulkan/gen7_pipeline.c
index 872025c7367..9126eb9b363 100644
--- a/src/vulkan/gen7_pipeline.c
+++ b/src/vulkan/gen7_pipeline.c
@@ -102,7 +102,7 @@ static const uint32_t vk_to_gen_front_face[] = {
static void
gen7_emit_rs_state(struct anv_pipeline *pipeline,
- const VkPipelineRasterStateCreateInfo *info,
+ const VkPipelineRasterizationStateCreateInfo *info,
const struct anv_graphics_pipeline_create_info *extra)
{
struct GEN7_3DSTATE_SF sf = {
@@ -351,8 +351,8 @@ genX(graphics_pipeline_create)(
assert(pCreateInfo->pVertexInputState);
gen7_emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
- assert(pCreateInfo->pRasterState);
- gen7_emit_rs_state(pipeline, pCreateInfo->pRasterState, extra);
+ assert(pCreateInfo->pRasterizationState);
+ gen7_emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra);
gen7_emit_ds_state(pipeline, pCreateInfo->pDepthStencilState);
@@ -391,7 +391,8 @@ genX(graphics_pipeline_create)(
anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_AA_LINE_PARAMETERS);
- const VkPipelineRasterStateCreateInfo *rs_info = pCreateInfo->pRasterState;
+ const VkPipelineRasterizationStateCreateInfo *rs_info =
+ pCreateInfo->pRasterizationState;
anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_CLIP,
.FrontWinding = vk_to_gen_front_face[rs_info->frontFace],
diff --git a/src/vulkan/gen8_pipeline.c b/src/vulkan/gen8_pipeline.c
index 8abd29c71e8..0adb0c39c03 100644
--- a/src/vulkan/gen8_pipeline.c
+++ b/src/vulkan/gen8_pipeline.c
@@ -92,7 +92,7 @@ emit_ia_state(struct anv_pipeline *pipeline,
static void
emit_rs_state(struct anv_pipeline *pipeline,
- const VkPipelineRasterStateCreateInfo *info,
+ const VkPipelineRasterizationStateCreateInfo *info,
const struct anv_graphics_pipeline_create_info *extra)
{
static const uint32_t vk_to_gen_cullmode[] = {
@@ -363,8 +363,8 @@ genX(graphics_pipeline_create)(
emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
assert(pCreateInfo->pInputAssemblyState);
emit_ia_state(pipeline, pCreateInfo->pInputAssemblyState, extra);
- assert(pCreateInfo->pRasterState);
- emit_rs_state(pipeline, pCreateInfo->pRasterState, extra);
+ assert(pCreateInfo->pRasterizationState);
+ emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState);
emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
pCreateInfo->pMultisampleState);