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authorIago Toral Quiroga <[email protected]>2018-07-27 13:38:39 +0200
committerIago Toral Quiroga <[email protected]>2018-08-01 08:08:15 +0200
commit471bce568916f4ade0e2c1cf975c3fe6045ebd9f (patch)
tree998cf2087c80ed0d00bc6b428b09e425ac6da10c
parent7e6c8b0cb75f41de18d3f2e7f91d6eb2522e939f (diff)
intel/compiler: implement 8-bit constant load
Fixes VK-GL-CTS CL#2567 Reviewed-by: Jason Ekstrand <[email protected]>
-rw-r--r--src/intel/compiler/brw_fs_nir.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 2c8595b9730..6e9a5829d3b 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1587,6 +1587,11 @@ fs_visitor::nir_emit_load_const(const fs_builder &bld,
fs_reg reg = bld.vgrf(reg_type, instr->def.num_components);
switch (instr->def.bit_size) {
+ case 8:
+ for (unsigned i = 0; i < instr->def.num_components; i++)
+ bld.MOV(offset(reg, bld, i), setup_imm_b(bld, instr->value.i8[i]));
+ break;
+
case 16:
for (unsigned i = 0; i < instr->def.num_components; i++)
bld.MOV(offset(reg, bld, i), brw_imm_w(instr->value.i16[i]));