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authorMichel Dänzer <[email protected]>2014-06-25 18:36:43 +0900
committerMichel Dänzer <[email protected]>2014-08-01 11:25:27 +0900
commit150ac07b855b5c5f879bf6ce9ca421ccd1a6c938 (patch)
tree5c8c63844a2a3ad6c79edb1b68d7004b9716b070
parent8898fff46cbf62baf4f924b6e8f537a9b1b26fa5 (diff)
r600g/radeonsi: Prefer VRAM for CPU -> GPU streaming buffers
Reviewed-by: Marek Olšák <[email protected]>
-rw-r--r--src/gallium/drivers/radeon/r600_buffer_common.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index 154c33d7391..d747cbcb930 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -110,14 +110,21 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
enum radeon_bo_flag flags = 0;
switch (res->b.b.usage) {
- case PIPE_USAGE_DYNAMIC:
- case PIPE_USAGE_STREAM:
- flags = RADEON_FLAG_GTT_WC;
- /* fall through */
case PIPE_USAGE_STAGING:
/* Transfers are likely to occur more often with these resources. */
res->domains = RADEON_DOMAIN_GTT;
break;
+ case PIPE_USAGE_STREAM:
+ case PIPE_USAGE_DYNAMIC:
+ /* Older kernels didn't always flush the HDP cache before
+ * CS execution
+ */
+ if (rscreen->info.drm_minor < 40) {
+ res->domains = RADEON_DOMAIN_GTT;
+ flags = RADEON_FLAG_GTT_WC;
+ break;
+ }
+ /* fall through */
case PIPE_USAGE_DEFAULT:
case PIPE_USAGE_IMMUTABLE:
default: