diff options
| author | Rob Clark <[email protected]> | 2017-11-17 11:14:55 -0500 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2017-11-17 11:19:34 -0500 |
| commit | a39d4032029f220ba5349d398a90f60ba358dca0 (patch) | |
| tree | cdbbc402011a37b0095c95b00a49d94cf00d5492 | |
| parent | 010ebed72aa82f930067bd49e4cc12469cc4eb6a (diff) | |
freedreno/a5xx/gmem: fix z32/s8 restore/resolve
BLIT_ZS mode is used for either combined z24/s8 or z32 in which case
BLIT_S mode is used for separate stencil.
Signed-off-by: Rob Clark <[email protected]>
| -rw-r--r-- | src/gallium/drivers/freedreno/a5xx/fd5_gmem.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c index 659127e2091..7b655954742 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_gmem.c @@ -473,7 +473,10 @@ emit_mem2gmem_surf(struct fd_batch *batch, uint32_t base, debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer); - if (buf == BLIT_ZS) { + if (buf == BLIT_S) + rsc = rsc->stencil; + + if ((buf == BLIT_ZS) || (buf == BLIT_S)) { // XXX hack import via BLIT_MRT0 instead of BLIT_ZS, since I don't // know otherwise how to go from linear in sysmem to tiled in gmem. // possibly we want to flip this around gmem2mem and keep depth @@ -551,7 +554,10 @@ fd5_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile) if (fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture); - emit_mem2gmem_surf(batch, gmem->zsbuf_base[0], pfb->zsbuf, BLIT_ZS); + if (!rsc->stencil || fd_gmem_needs_restore(batch, tile, FD_BUFFER_DEPTH)) + emit_mem2gmem_surf(batch, gmem->zsbuf_base[0], pfb->zsbuf, BLIT_ZS); + if (rsc->stencil && fd_gmem_needs_restore(batch, tile, FD_BUFFER_STENCIL)) + emit_mem2gmem_surf(batch, gmem->zsbuf_base[1], pfb->zsbuf, BLIT_S); } } @@ -602,6 +608,9 @@ emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base, struct fd_resource_slice *slice; uint32_t offset; + if (buf == BLIT_S) + rsc = rsc->stencil; + slice = fd_resource_slice(rsc, psurf->u.tex.level); offset = fd_resource_offset(rsc, psurf->u.tex.level, psurf->u.tex.first_layer); @@ -635,12 +644,11 @@ fd5_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile) if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) { struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture); - // XXX BLIT_ZS vs BLIT_Z32 .. need some more cmdstream traces - // with z32_x24s8.. + if (!rsc->stencil || (batch->resolve & FD_BUFFER_DEPTH)) emit_gmem2mem_surf(batch, gmem->zsbuf_base[0], pfb->zsbuf, BLIT_ZS); if (rsc->stencil && (batch->resolve & FD_BUFFER_STENCIL)) - emit_gmem2mem_surf(batch, gmem->zsbuf_base[1], pfb->zsbuf, BLIT_ZS); + emit_gmem2mem_surf(batch, gmem->zsbuf_base[1], pfb->zsbuf, BLIT_S); } if (batch->resolve & FD_BUFFER_COLOR) { |